Hong Koo Baik

Low‐Temperature, Solution‐Processed and Alkali Metal Doped ZnO for High‐Performance Thin‐Film Transistors

) and its dep-osition requires a high-cost vacuum process. More importantly, the poor transparency of silicon makes it unsuitable for trans-parent applications, and transparency is one of the key issues for future display technology. Consequently, in a search for alterna-tives for amorphous silicon, considerable interest has focused on metal oxide semiconductors, such as In, Ga, or Zn oxides, as these exhibit high optical transparencies, and have excel-lent electrical properties with high electron mobility, chemical stability, and solution processability. For example, ZnO-based semiconductors have been successfully incorporated into var-ious electronic devices, such as electron transfer layers for solar cells,

Transparent organic light-emitting diodes consisting of a metal oxide multilayer cathode

The authors have developed a semitransparent, multilayered cathode of indium tin oxide (ITO)/Ag/tungsten oxide (WO3) for transparent organic light-emitting diodes. The device showed a weak negative differential resistance (NDR), until the operating voltage of 8V was reached. NDR was due to the resonant tunneling by both the quantum barrier and quantum well. The silver oxide (Ag2O) on the Ag metal was confirmed by x-ray photoelectron spectroscopy, and the energy levels of Ag2O were quantized due to the quantum size effect and this produced the resonant tunneling channels. The device using ITO∕Ag∕WO3 with a LiF∕Al bilayer was superior to those devices which only used ITO or WO3, mainly because the out coupling was enhanced by employing a WO3 material, which is much more transparent than ITO.

Low-temperature, high-performance solution-processed thin-film transistors with peroxo-zirconium oxide dielectric.

We demonstrated solution-processed thin film transistors on a peroxo-zirconium oxide (ZrO(2)) dielectric with a maximum temperature of 350 °C. The formation of ZrO(2) films was investigated by TG-DTA, FT-IR, and XPS analyses at various temperatures. We synthesized a zirconium oxide solution by adding hydrogen peroxide (H(2)O(2)). The H(2)O(2) forms peroxo groups in the ZrO(2) film producing a dense-amorphous phase and a smooth surface film. Because of these characteristics, the ZrO(2) film successfully blocked leakage current even in annealing at 300 °C. Finally, to demonstrate that the ZrO(2) film is dielectric, we fabricated thin-film transistors (TFTs) with a solution-processed channel layer of indium zinc oxide (IZO) on ZrO(2) films at 350 °C. These TFTs had a mobility of 7.21 cm(2)/(V s), a threshold voltage (V(th)) of 3.22 V, and a V(th) shift of 1.6 V under positive gate bias stress.

Silicide formation in cobalt/amorphous silicon, amorphous CoSi and bias-induced CoSi films

Abstract The silicide formation in cobalt/amorphous silicon multilayer films, amorphous cobalt-silicon films, and bias-induced cobalt-silicon films has been examined by differential scanning calorimetry, X-ray diffraction, and transmission electron microscopy. For amorphous cobalt-silicon and bias-induced cobalt-silicon films, Co 2 Si forms as a firstsilicide phase, followed by the formation of CoSi and CoSi 2 . For a Co/a-Si multilayer film with the atomic concentration ratio of the cobalt to silicon layer being 1:2, CoSi is found to be formed as the first silicide phase. It is confirmed that CoSi, Co 2 Si, CoSi, and CoSi 2 form sequentially as the scanning temperature increases. The observed phase sequence is analyzed by the effective heat of formation. A structure factor in addition to the effective heat of formation is used to explain the difference in the formation of the firstphase between cobalt/amorphous silicon multilayer films, amorphous cobalt-silicon alloy films, and bias-induced cobalt-silicon films. For the case of bias-induced cobalt-silicon films prepared at various substrate temperatures and bias conditions, the phase sequence and crystallinity of cobalt silicide have a stronger dependence on the substrate bias voltage than on the substrate temperature due to the effects of collisional cascade mixing, in-situ cleaning, and an increase in the number of nucleation sites by ion bombardment on the growing surface. Also, bias-induced epitaxial CoSi 2 layer is grown at 200 °C,a much lower temperature than molecular beam epitaxy. In order to quantitatively explain low-temperature epitaxial growth of the CoSi 2 layer, the Ar ion energy transferred to Co and Si atomsand the resputtering yield as a function of substrate bias voltage are calculated.

Effect of PEDOT Nanofibril Networks on the Conductivity, Flexibility, and Coatability of PEDOT:PSS Films.

The use of poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) in electrodes and electrical circuits presents a number of challenges that are yet to be overcome, foremost amongst which are its relatively low conductivity, low coatability on hydrophobic substrates, and decreased conductivity at large strains. With this in mind, this study suggests a simple way to simultaneously address all of these issues through the addition of a small amount of a nonionic surfactant (Triton X-100) to commercial PEDOT:PSS solutions. This surfactant is shown to considerably reduce the surface tension of the PEDOT:PSS solution, thus permitting conformal coatings of PEDOT:PSS thin film on a diverse range of hydrophobic substrates. Furthermore, this surfactant induces the formation of PEDOT nanofibrils during coating, which led to the high conductivity values and mechanical stability at large strains (ε=10.3%). Taking advantage of the superior characteristics of these PEDOT:PSS thin films, a highly flexible polymer solar cell was fabricated. The power conversion efficiency of this solar cell (3.14% at zero strain) was preserved at large strains (ε=7.0%).

Boron-Doped Peroxo-Zirconium Oxide Dielectric for High-Performance, Low-Temperature, Solution-Processed Indium Oxide Thin-Film Transistor

We developed a solution-processed indium oxide (In2O3) thin-film transistor (TFT) with a boron-doped peroxo-zirconium (ZrO2:B) dielectric on silicon as well as polyimide substrate at 200 °C, using water as the solvent for the In2O3 precursor. The formation of In2O3 and ZrO2:B films were intensively studied by thermogravimetric differential thermal analysis (TG-DTA), attenuated total reflectance Fourier transform infrared spectroscopy (ATR-FT IR), high-resolution X-ray diffraction (HR-XRD), and X-ray photoelectron spectroscopy (XPS). Boron was selected as a dopant to make a denser ZrO2 film. The ZrO2:B film effectively blocked the leakage current at 200 °C with high breakdown strength. To evaluate the ZrO2:B film as a gate dielectric, we fabricated In2O3 TFTs on the ZrO2:B dielectrics with silicon substrates and annealed the resulting samples at 200 and 250 °C. The resulting mobilities were 1.25 and 39.3 cm(2)/(V s), respectively. Finally, we realized a flexible In2O3 TFT with the ZrO2:B dielectric on a polyimide substrate at 200 °C, and it successfully operated a switching device with a mobility of 4.01 cm(2)/(V s). Our results suggest that aqueous solution-processed In2O3 TFTs on ZrO2:B dielectrics could potentially be used for low-cost, low-temperature, and high-performance flexible devices.

Low-voltage high-mobility pentacene thin-film transistors with polymer/high-k oxide double gate dielectrics

We report on the fabrication of pentacene-based thin-film transistors (TFTs) with poly-4-vinylphenol (PVP)/yttrium oxide (YOx) double gate insulator films. The minimum PVP and YOx layer thicknesses were chosen to be 45 and 50nm, respectively. The PVP and YOx double dielectric layers with the minimum thicknesses exhibited a high dielectric capacitance of 70.8nF∕cm2 and quite a good dielectric strength of ∼2MV∕cm at a leakage current level of ∼10−6A∕cm2 while the leakage current from either PVP or YOx alone was too high. Our pentacene TFTs with the 45nm thin PVP∕50nm thin YOx films operated at −5V showing a high field effect mobility of 1.74cm2∕Vs and a decent on/off current ratio of 104. Our work demonstrates that the PVP∕YOx double layer is a promising gate dielectric to realize low-voltage high-mobility organic TFTs.

Fabrication of amorphous-carbon-nitride field emitters

To improve silicon field emitters, an amorphous-carbon-nitride (a-CN) coating was applied by helical resonator plasma-enhanced chemical vapor deposition. By this process, a-CN was very uniformly coated on silicon tips without any damage. Microstructural and electrical investigation of the silicon and a-CN coated field emitters were performed. a-CN coating lowered turn-on voltage and increased emission current. Negative electron affinity of carbon nitride is suggested for enhancing emission current.

Large scale synthesis of carbon nanotubes by plasma rotating arc discharge technique

The large-scale synthesis of carbon nanotubes is achieved by plasma rotating arc discharge. The graphite anode is rotated at a high velocity for the synthesis of carbon nanotubes. Conventional arc discharge is an unstable process because of the cathode spot phenomena, which induces an inhomogeneity of the electric field distribution and a discontinuity of the current flow. The rotation of the anode distributes the microdischarges uniformly and generates a stable plasma. The centrifugal force by the rotation generates the turbulence and accelerates carbon vapor perpendicular to the anode. It is not condensed at the cathode surface but collected on the graphite collector that was placed at the periphery of the plasma. The nanotube yield increases as the rotation speed of the anode increases and the collector becomes closer to the plasma. The reason for this is because two conditions are optimized. One is the high density of carbon vapor that is created by uniform and high temperature plasma for nucleation and the other is the sufficient temperature of collectors for nanotube growth. The plasma rotating electrode process is a continuous process of the stable discharge and it is expected to perform the mass production of high quality nanotubes.

Low-voltage-driven top-gate ZnO thin-film transistors with polymer/high-k oxide double-layer dielectric

The authors report on the fabrication of a low-voltage-driven top-gate ZnO thin-film transistor with a polymer/high-k oxide double-layer dielectric. Hybrid double-layer dielectric (k=∼9.8) was formed on patterned ZnO through sequential deposition processes: spin casting of 45-nm-thin poly-4-vinylphenol and e-beam evaporation of 50-nm-thick amorphous high-k oxide (CeO2–SiO2 mixture). Room-temperature-deposited ZnO channel exhibits much rougher surfaces compared to that of 100°C deposited ZnO, so that enhanced device performances were achieved from a ZnO thin-film transistor (TFT) prepared with 100°C deposited ZnO: ∼0.48cm2∕Vs for field-effect mobility and ∼5×103 for on/off current ratio. Adopting our top-gate ZnO-TFT, a load-resistance inverter was set up and demonstrated decent static and dynamic operations at 3V.