Hongyang Wu

Analysis and Implementation of LLC Burst Mode for Light Load Efficiency Improvement

Burst mode control is applied to improve light load efficiency of LLC converter in this paper. Detailed analysis on characteristic and operation processes of LLC burst mode control with SR is presented. Based on the analysis, some important rules of LLC burst mode control are proposed, which is the key to achieve high light load efficiency. The rules include: the suitable primary and secondary driving timing, design guild line of output filter, reasonable control strategy etc. To verify the analysis, a prototype with 12V/100A output has been built. Thanks to the proposed control strategy and optimum design, light load efficiency of LLC converter can be improved significantly, such as efficiency at 10% load can be improved from 92.5% to 94.8%.

Asymmetrical H-PFC for Low Line Applications

In this paper, a novel bridgeless power factor correction (PFC) circuit has been proposed. High efficiency can be obtained especially at low line condition because no input bridge rectifier is used in the proposed topology. A concept of unique configuration of diodes has been proposed to reduce the common-mode (CM) conducted noise. Eventually, an 800 W prototype has been built. And experimental results show high efficiency and acceptable original CM noise.

A precise ZVS range calculation method for full bridge converter

This paper presents a more precise ZVS range calculation method for ZVS full-bridge converter. Primary current downward step during the leading leg transition is mainly analyzed. This downward step often ignored, caused by the rectifier junction capacitance discharging, will significantly influence the ZVS range of the lagging leg power switch. An 800 W ZVS full bridge converter prototype is constructed and experimental results verified the validity of the proposed method.

A Novel Control Method of Interleaved Two-Transistor Forward Converter

A novel soft recovery control method of interleaved two-transistor forward converter (ITTFC) is introduced in this paper. Its operation principles are analyzed and compared with the conventional control of ITTFC, by which it shows the method can reduce the voltage stress and reverse recovery loss of secondary rectifier, and potentially, can eliminate secondary free-wheeling diode without performance penalty. The analysis is verified by a 700 W prototype, which proves the new control method can achieve higher efficiency, especially under the light load condition. For the CM EMI issue resulting from new control method, the paper proposes a very simple solution.

Modeling and analysis of a novel rectifier voltage stress mechanism

This paper presents a novel output rectifier voltage stress mechanism at light load for a phase shifted full bridge converter. The resonance between parasitic capacitor, leakage inductor and external inductor during duty cycle loss period contributes a lot to the voltage stress of the output rectifier at light load. Due to the parasitic resonance, the voltage stress of the rectifier at light load case is typically more severe than that at heavy load case. The paper explains the novel rectifier voltage stress mechanism and verifies it by experimental results.

Embedded structure for a voltage clamping circuit

In this paper, a novel embedded voltage clamping structure is proposed for an IGBT module. Firstly, the negative effect of loop inductances in the voltage clamping circuit is analyzed. And then, a novel embedded structure is proposed to minimize the parasitic inductances in the voltage clamping loop. Finally, an experiment is carried out on an IGBT module. With the proposed embedded structure, the IGBT voltage spike is maximally limited at the turn-off transient, which keeps the device operating in a much safer region.