Hoyong Kang

A New Approach to Low-Power and Low-Latency Wake-Up Receiver System for Wireless Sensor Nodes

A new wake-up receiver is proposed to reduce energy consumption and latency through adoption of two different data rates for the transmission of wake-up packets. To reduce the energy consumption, the start frame bits (SFBs) of a wake-up packet are transmitted at a low data rate of 1 kbps, and a bit-level duty cycle is employed for detection of SFBs. To reduce both energy consumption and latency, duty cycling is halted upon detection of the SFB sequence, and the rest of the wake-up packet is transmitted at a higher data rate of 200 kbps. The proposed wake-up receiver is designed and fabricated in a 0.18 μm CMOS technology with a core size of 1850×1560 μm for the target frequency range of 902-928 MHz. The measured results show that the proposed design achieves a sensitivity of -73 dBm, while dissipating an average power of 8.5 μW from a 1.8 V supply.

A CMOS Burst-Mode TIA with Step AGC and Selective Internally Created Reset for 1.25Gb/s EPON

A selective internal reset mechanism that allows the burst-mode TIA to recover a burst-mode signal as a stand-alone device in EPON is discussed. Using step AGC, the TIA achieves a DR of 27dB and a sensitivity of -31dBm with a PIN photodiode. Moreover, with internal reset, the loud/soft ratio is also 27dB within 100ns guard and preamble times.

Dynamic Modeling of Piezoelectric Energy Harvesting Device and Experiments

This paper is concerned with the development of the piezoelectric energy harvesting(PEH) device for ubiquitous sensor node(USN). The USN needs auxiliary power to lengthen its operational life. In this study, the piezoelectric energy harvesting system consisting of a cantilever with a tip mass and piezoelectric wafer was investigated in detail both theoretically and experimentally. The dynamic model for the addressed system was derived using the assumed mode method. The resulting equations of motion were expressed in matrix form, which had never been developed before. The power output characteristics of the PEH was then calculated and discussed. Various experiments were carried out to investigate the charging characteristics of electrical components. Theoretical and experimental results showed that the PEH was able to charge a battery with ambient vibrations but still needed an effective mechanism which can convert mechanical energy to electrical energy and an optimal electric circuit which dissipates small energy.

A CMOS single-chip for 868 MHz and 915 MHz bands wireless sensor network applications

This paper presents the design and experimental results of low power CMOS single-chip for 868 MHz and 915 MHz bands wireless sensor network applications based on IEEE 802.15.4 standard; especially RF transceiver part. Single-chip radio consists of RF transceiver section and digital baseband section. Implemented in a 0.18 μm CMOS technology the receiver shows sensitivity of -100dBm and -93 dBm in BPSK and OQPSK modulation schemes, respectively, and dynamic range of 80 dB. The transmitter path shows a maximum of +10 dBm output power with EVM of less than 6.8% RMS and 12% RMS in BPSK and OQPSK modulation schemes, respectively. The RF transceiver consumes 16 mA in receive mode and 24.5 mA in transmit mode under supply voltage of 1.8 V in which 5 mA of frequency synthesizer is included. The implemented single-chip occupies 16 mm2 silicon area in which 10 mm2 is used for the RF transceiver section.

A CMOS single-chip transceiver design for 700/800/900MHz wireless sensor network applications

This paper presents a low-power CMOS single-chip transceiver for sub-GHz wireless sensor network applications, which complies IEEE 802.15.4-2012 standard. It embodies RF transceiver section based on direct-conversion transmitter and low-IF receiver architecture. To validate its operation, the prototype is fabricated in 0.18um GF standard CMOS process. It shows +5dBm TX output power and -85dBm RX sensitivity. Furthermore, RX dynamic range reaches up to 90dB. The transceiver consumes 26mA and 18mA for TX and RX operations under 1.8V supply voltage, respectively. It occupies 10mm2 active area for the RF transceiver section.

IEEE 802.15.4g SUN MR-OQPSK PHY using a novel CA-CDM scheme

This paper presents a constant amplitude code division multiplexing scheme and the corresponding decoding algorithm for the IEEE 802.15.4g network (WPAN) standard for advanced utility service. The proposed scheme based on a turbo product code (TPC) consists of single parity check code and Hadamard code. Thus, an iterative TPC decoder can be exploited within a receiver for the proposed scheme. The proposed scheme offers constant amplitude output with low peak-to-average power ratio compared to conventional code division multiplexing schemes.

A fully integrated CMOS burst-mode upstream transmitter for gigabit-class passive optical network applications

A fully integrated burst-mode upstream transmitter chip for gigabit-class passive optical network applications is implemented in 0.18mum CMOS technology. In order to control consecutive burst data, the transmitter proposed in this paper uses a reset mechanism with TX_enable as a burst envelope signal. The feedback from the monitoring photodiode (MPD) is separated by two independent paths for temperature compensation. The chip tested with chip-on-board configuration shows an average power of 2dBm with extinction ratio of above 12dB under 1.25Gb/s burst- mode operation. Based on the measurement, this work complies with the GPON ITU-T Recommendation G.984.2.