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Dive into the research topics where Hung-Yi Hsieh is active.

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Featured researches published by Hung-Yi Hsieh.


Sensors | 2010

Development of a portable electronic nose system for the detection and classification of fruity odors.

Kea-Tiong Tang; Shih-Wen Chiu; Chih-Heng Pan; Hung-Yi Hsieh; Yao‐Sheng Liang; Ssu-Chieh Liu

In this study, we have developed a prototype of a portable electronic nose (E-Nose) comprising a sensor array of eight commercially available sensors, a data acquisition interface PCB, and a microprocessor. Verification software was developed to verify system functions. Experimental results indicate that the proposed system prototype is able to identify the fragrance of three fruits, namely lemon, banana, and litchi.


IEEE Transactions on Neural Networks | 2012

VLSI Implementation of a Bio-Inspired Olfactory Spiking Neural Network

Hung-Yi Hsieh; Kea-Tiong Tang

This paper presents a low-power, neuromorphic spiking neural network (SNN) chip that can be integrated in an electronic nose system to classify odor. The proposed SNN takes advantage of sub-threshold oscillation and onset-latency representation to reduce power consumption and chip area, providing a more distinct output for each odor input. The synaptic weights between the mitral and cortical cells are modified according to an spike-timing-dependent plasticity learning rule. During the experiment, the odor data are sampled by a commercial electronic nose (Cyranose 320) and are normalized before training and testing to ensure that the classification result is only caused by learning. Measurement results show that the circuit only consumed an average power of approximately 3.6 μW with a 1-V power supply to discriminate odor data. The SNN has either a high or low output response for a given input odor, making it easy to determine whether the circuit has made the correct decision. The measurement result of the SNN chip and some well-known algorithms (support vector machine and the K-nearest neighbor program) is compared to demonstrate the classification performance of the proposed SNN chip.The mean testing accuracy is 87.59% for the data used in this paper.


IEEE Transactions on Neural Networks | 2013

Hardware Friendly Probabilistic Spiking Neural Network With Long-Term and Short-Term Plasticity

Hung-Yi Hsieh; Kea-Tiong Tang

This paper proposes a probabilistic spiking neural network (PSNN) with unimodal weight distribution, possessing long- and short-term plasticity. The proposed algorithm is derived by both the arithmetic gradient decent calculation and bioinspired algorithms. The algorithm is benchmarked by the Iris and Wisconsin breast cancer (WBC) data sets. The network features fast convergence speed and high accuracy. In the experiment, the PSNN took not more than 40 epochs for convergence. The average testing accuracy for Iris and WBC data is 96.7% and 97.2%, respectively. To test the usefulness of the PSNN to real world application, the PSNN was also tested with the odor data, which was collected by our self-developed electronic nose (e-nose). Compared with the algorithm (K-nearest neighbor) that has the highest classification accuracy in the e-nose for the same odor data, the classification accuracy of the PSNN is only 1.3% less but the memory requirement can be reduced at least 40%. All the experiments suggest that the PSNN is hardware friendly. First, it requires only nine-bits weight resolution for training and testing. Second, the PSNN can learn complex data sets with a little number of neurons that in turn reduce the cost of VLSI implementation. In addition, the algorithm is insensitive to synaptic noise and the parameter variation induced by the VLSI fabrication. Therefore, the algorithm can be implemented by either software or hardware, making it suitable for wider application.


Sensors | 2012

An Analog Multilayer Perceptron Neural Network for a Portable Electronic Nose

Chih-Heng Pan; Hung-Yi Hsieh; Kea-Tiong Tang

This study examines an analog circuit comprising a multilayer perceptron neural network (MLPNN). This study proposes a low-power and small-area analog MLP circuit to implement in an E-nose as a classifier, such that the E-nose would be relatively small, power-efficient, and portable. The analog MLP circuit had only four input neurons, four hidden neurons, and one output neuron. The circuit was designed and fabricated using a 0.18 μm standard CMOS process with a 1.8 V supply. The power consumption was 0.553 mW, and the area was approximately 1.36 × 1.36 mm2. The chip measurements showed that this MLPNN successfully identified the fruit odors of bananas, lemons, and lychees with 91.7% accuracy.


asia pacific conference on circuits and systems | 2012

A spiking neural network chip for odor data classification

Hung-Yi Hsieh; Kea-Tiong Tang

An artificial nose, also known as an “electronic nose” (E-Nose), has found many applications. One of the restrictions for E-Nose becoming popular is its size and power consumption. To reduce the power consumption and physical size of an E-Nose system, a power-efficient odor data classification chip is advantageous. This paper presents a low-power, neuromorphic spiking neural network chip which can be integrated in an electronic nose system to perform odor data classification. The network is composed of integrate-and-fire neurons, using spike-timing dependent plasticity for learning. The network has been fabricated by TSMC 0.18 μm CMOS process. The chip area is 1.033×1.383 mm2. Measurement results show that the chip can correctly classify real world gas data (hami and lemon) sampled by the commercial E-Nose, Cyranose 320. The supply voltage is 1.2 V; the power consumption is 3.6 μW. This learning chip features small area, low voltage and low power, and is very suitable for being integrated in an E-Nose system. The power and size of the E-Nose can be reduced and have more extensive applications.


OLFACTION AND ELECTRONIC NOSE: PROCEEDINGS OF THE 14TH INTERNATIONAL SYMPOSIUM ON OLFACTION AND ELECTRONIC NOSE | 2011

VLSI Implementation of a Bio‐inspired Olfactory Spiking Neural Network

Hung-Yi Hsieh; Kea-Tiong Tang

This paper proposes a VLSI circuit implementing a low power, high‐resolution spiking neural network (SNN) with STDP synapses, inspired by mammalian olfactory systems. By representing mitral cell action potential by a step function, the power consumption and the chip area can be reduced. By cooperating sub‐threshold oscillation and inhibition, the network outputs can be distinct. This circuit was fabricated using the TSMC 0.18 μm 1P6M CMOS process. Post‐layout simulation results are reported.


international symposium on neural networks | 2010

A low-power, high-resolution WTA utilizing translinear-loop pre-amplifier

Hung-Yi Hsieh; Kea-Tiong Tang; Zen-Huan Tsai; Hsin Chen

This paper proposes a low-power, high-resolution Winner-Take-All (WTA) circuit basing on transistors in subthreshold operation. The WTA adapts a tree structure to reduce the effect of process variations. In addition to the traditional way of using positive feedback to improve the comparison performance, we propose to use translinear loop to amplify the difference between two inputs before comparison to achieve high resolution. The circuit has been fabricated with TSMC 0.35µm 2P4M process. The WTA operates with input current as low as a few nano amperes and resolution as high as 0.1%. Measurement results show that the circuit has a non-negligible offset. Discussions on the source of the offset with a proposed solution are also given.


international symposium on circuits and systems | 2009

A portable electronic nose system that can detect fruity odors

Kea-Tiong Tang; Hung-Yi Hsieh; Chih-Heng Pan; Jyuo-Min Shyu; Yi-Shan Lin

When a visitor comes to our demonstration, he/she will get a hands-on experience of the portable electronic nose system. The portable electronic nose system is composed of a sensor array (sensor head) part and an electronics part. The sensors are made of polymer/mesoporous carbon composite materials for high sensitivity and selectivity. The electronics are sensor interface circuitry together with a microprocessor. The visitor will learn the principle of electronic nose system and what it is capable of doing in the following two steps:


international conference on neural information processing | 2017

An Analog Probabilistic Spiking Neural Network with On-Chip Learning

Hung-Yi Hsieh; Pin-Yi Li; Kea-Tiong Tang

Portable or biomedical applications typically require signal processing, learning, and classification in conditions involving limited area and power consumption. Analog implementations of learning algorithms can satisfy these requirements and are thus attracting increasing attention. Probabilistic spiking neural network (PSNN) is a hardware friendly algorithm that is relax in weight resolution requirements and insensitive to noise and VLSI process variation. In this study, the probabilistic spiking neural network was implemented using analog very-large-scale integration (VLSI) to verify their hardware compatibility. The circuit was fabricated using 0.18 μm CMOS technology. The power consumption of the chip was less than 10 μW with a 1 V supply and the core area of chip was 0.43 mm2. The chip can classify the electronic nose data with 92.3% accuracy and classify the electrocardiography data with 100% accuracy. The low power and high learning performance features make the chip suitable for portable or biomedical applications.


biomedical circuits and systems conference | 2013

An on-chip learning, low-power probabilistic spiking neural network with long-term memory

Hung-Yi Hsieh; Kea-Tiong Tang

This paper describes an analog probabilistic spiking neural network (PSNN) circuit for portable and implanted applications which especially require low power, small area and on-chip learning to ensure good mobility, body safety and continually accurate classification. The circuit is implemented using TSMC 0.18μm CMOS technology. Simulation results show that the circuit can learn linearly non-separable exclusive-or (xor) problem under 1V supply with only 3.8μW of power consumption. Long-term, multi-stage synaptic memory contains more information for a longer time in a single synapse. Comparison of the proposed PSNN with recent hardware neural networks is also provided.

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Kea-Tiong Tang

National Tsing Hua University

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Shih-Wen Chiu

National Tsing Hua University

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Chih-Heng Pan

National Tsing Hua University

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Chung-Hung Shih

Taipei Medical University

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Han-Wen Kuo

National Central University

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Li-Chun Wang

National Chiao Tung University

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Pin-Yi Li

National Tsing Hua University

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Cheng-Han Yang

National Tsing Hua University

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Hsin Chen

National Tsing Hua University

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Jyuo-Min Shyu

National Tsing Hua University

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