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Dive into the research topics where Hyunsik Jo is active.

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Featured researches published by Hyunsik Jo.


ieee international energy conference | 2014

Grid-connected Battery Test System with AC regenerating capability

Hyunsik Jo; Byung-Moon Han; Hanju Cha

In this paper, battery test system with AC regeneration capability is proposed. The proposed 5kW battery test system consists of 32 channels of battery module, two three-phase bi-directional isolated interleaved dc-dc converters and three-phase inverter. In discharge mode, energy from batteries is delivered to grid and energy is delivered to battery from grid in charge mode. Grid currents are sinusoidally controlled with low THD and unity power factor, and average current sharing control is implemented for balanced parallel operation in three-phase dc-dc converters. By using this method, unbalance factor is maintained within 1%. Two 5kW battery test system are built and the proposed several control methods are verified through experiments.


vehicle power and propulsion conference | 2012

Three-phase voltage sag compensator for smart grid and infrastructure

Hyunsik Jo; Wujong Lee; Hanju Cha

In this paper, a 10kW three-phase voltage sag compensator and control algorithms are proposed. Three-phase voltage sag compensator is able to compensate for input voltage sag or interruption and provides a secured electric power to the critical loads such as computers, automation equipment, and communications equipment. The compensator detects a voltage sag or interruption within 2-msec and provides the rated voltage from supercapacitor bank to load. To provide clean sinusoidal voltage even in the nonlinear load, selective harmonic elimination method for voltage control is proposed and added to the synchronous reference frame PI control. By using the method, THD less than 5% is achieved in the linear and nonlinear load. The feasibility of the proposed methods is verified through simulation and experiments with a 10kW prototype of three-phase voltage sag compensator.


applied power electronics conference | 2015

ITER VS converter control for circulation current and commutation failure

Hyunsik Jo; Hanju Cha

In this paper, analysis and experiment of ITER VS converters control are investigated. ITER VS converter supplies voltage (±1000V) and current (±25kA) to the superconducting magnets for plasma current vertical stabilization and 4-quadrant operation must be achieved without zero-current discontinuous section. To remove zero-current discontinuous section, circulation current control is required, but it is hard to analyze and design because of characteristic of thyristor nonlinearity. In this paper, delay time of thyristor and processor is implemented using a zero-order holder and equivalent model is analyzed. Circulation current control gains are derived to satisfy the phase margin of 60°. In addition, gamma control is designed to restrict the firing angle to prevent the commutation failure. Commutation failure is prevented by the proposed gamma control even though short circuit or sag occur in grid. To verify a feasibility of the proposed control algorithm, real controller is assembled and power system including the VS converter is implemented in the RTDS (Real Time Digital Simulator) for the hardware-in-loop (HIL) facility. By using the proposed control method, experimental results are well matched to the analysis.


applied power electronics conference | 2014

Parallel operation of three-phase bi-directional isolated interleaved DC-DC converters for battery test system

Hyunsik Jo; Hanju Cha

In this paper, parallel control method of two 2.5 kW three-phase bi-directional isolated interleaved dc-dc converters for the battery test system is discussed. The battery test system consists of battery modules, two three-phase bi-directional isolated interleaved dc-dc converters and three-phase inverter. In discharge mode, energy from battery is delivered to grid and energy is delivered to battery from grid in charge mode. To get decent phase margin and magnitude at crossover frequency, type 3 controller is used for voltage controller. Average current sharing control method is used for maintaining each three-phase dc-dc converter current equal. By using this method, unbalance factor is improved to 1% from 8%. Two 2.5 kW three-phase bidirectional dc-dc converter prototypes are built and the proposed methods are verified through experiments.


The Transactions of the Korean Institute of Power Electronics | 2014

Comparative Analysis of Sequence Control in Six Series-Connected ITER VS Converters

Hyunsik Jo; Jinyong Jeong; Jongmin Jo; Hanju Cha

This study investigates the structure and operation of the ITER VS converter and proposes a sequence control method for six series-connected VS converters to reduce reactive power. The operation and the proposed sequence control method are verified through RTDS simulation. The ITER VS converter must supply voltage/current to the superconducting magnets for plasma current vertical stabilization, and the four-quadrant operation must proceed without a zero-current discontinuous section. The operation mode of the VS converter is separated into a 12and 6-pulse circulating current and transition modes according to the size of the load current. The output voltage of the unit VS converter is limited because of the rated voltage; however, the superconducting coil must increase the operating output voltage. Thus, the VS converter must be connected in a 6-series to provide the required operating output voltage. The output voltage of the VS converters is controlled continuously; however, reactive power is limited within a minimized value of the grid. In this study, the unit converter is compared with converters connected in a 6-series to determine a suitable sequence control method. The output voltage is the same in all cases, but the maximum reactive power is reduced from 100% to 73%. This sequence control method is verified through RTDS simulation.


applied power electronics conference | 2013

A dynamic voltage restorere with a selective harmonic mitigation and robust peak detection

Hyunsik Jo; Ilyong Lee; Byung-Moon Han; Hanju Cha

In this paper, a three-phase dynamic voltage restorer and control algorithms are proposed. The compensator detects a voltage sag or interruption within 2-msec delay and provides rated voltage from supercapacitor bank to the critical load. The proposed peak detection method calculates the fundamental and harmonic components by using the discrete Fourier transform, and has a constant detection response regardless of phase angle at which sag occurs. The proposed detection method shows a fast and robust response even under the distorted grid voltage condition, which is polluted by harmonics. During the sag compensation, a new selective harmonic mitigating method for voltage controller is proposed and 5% of THD is achieved even in the nonlinear load. The proposed methods are verified by simulation and experiment with 10kVA DVR prototype.


IEEE Transactions on Industry Applications | 2017

Verification of Vertical Stabilization Converter for Superconducting Coil by using Real-Time Simulator

Hyunsik Jo; Hanju Cha

In this paper, verification of operation and control of a vertical stabilization (VS) converter for a superconducting coil by using a real-time digital simulator (RTDS) is described. The VS converter supplies voltage (±1000 V) and current (±22.5 kA) to the superconducting coil for plasma current VS, and four-quadrant operation must be achieved without a zero-current discontinuous section. To remove any zero-current discontinuous sections, circulation current control is required, but it is hard to analyze and design it because of the characteristics of thyristor nonlinearity. In this paper, delay time of the thyristor and processor is implemented using a zero-order hold, and an equivalent model is designed and analyzed. Circulation current control and difference current control are similarly analyzed because both equivalent circuits are the same, and are satisfied with a 54° phase margin and a 11 ms step response. In addition, gamma control is designed to restrict the firing angle to prevent commutation failure and commutation failure is prevented by the proposed gamma control, even if a short circuit or sag occurs in the grid. To verify the feasibility of the VS converter, a real Zynq-based controller is assembled and a power system, including the VS converter, is implemented in an RTDS for the hardware-in-the-loop simulation. Moreover, the small-scaled VS converter is built and tested. Experimental results are well-matched to simulation results and analysis.


IEEE Transactions on Industrial Electronics | 2017

Sequence Control Verification of a Central Solenoid Converter for Nuclear Fusion Reactors by Using a Hardware-in-the-Loop

Hyunsik Jo; Hanju Cha

In this paper, verification of a four-series connected central solenoid (CS) converter sequence control of a nuclear fusion reactor to reduce reactive power by using a real-time digital simulator is described. The unit CS converter supplies voltage (±975 V) and current (±45 kA) to the CS superconducting magnets to induce current in plasma. The output voltage of the unit CS converter is limited because of the rated voltage of thyristor switches. However, the CS superconducting coil needs more operating output voltage. Thus, the CS converter must be connected in four series to provide the required operating output voltage. Adequate reactive power support is important to improve the electrical grid stability, because four-series connected CS converter generate large amounts of reactive power. However, other reactive compensators require high costs and a large area. Hence, sequence control is applied to the voltage control of the four-series connected CS converter in order to reduce the reactive power. The sequence controller calculates and transmits the individual voltage command to each unit CS converter according to the total voltage command via safe ring-type communication channel. To verify the feasibility of the proposed sequence control of four-series connected CS converter, five real Zynq-based controllers are assembled and a power system, including the four unit CS converters, is implemented in a real-time digital simulator for hardware-in-the-loop verification. Maximum reactive power is reduced by 16%, from 225 to 190 Mvar.


applied power electronics conference | 2016

A new capacitance estimation method of supercapacitor bank using a bank impedance and current injection

Junwon Lee; Hyunsik Jo; Hanju Cha

This paper proposes a capacitance estimation method of the supercapacitor bank in the supercapacitor energy storage system (SCESS). To diagnose a deterioration, the capacitance of the supercapacitor bank is estimated by using a current injection. The injected current causes an AC ripple voltage and AC ripple current in the supercapacitor bank, which are extracted by using the proposed signal processing method. The proposed method provides an accurate value of the capacitance for reliability and durability of the supercapacitor energy storage system. Usefulness of the proposed estimation method is verified through simulation and experiment with a prototype of a 10kW SCESS. Experimental results shows that the maximum estimation error rate is less than 3% at both 2.25F and 2.57F capacitance bank.


The Transactions of the Korean Institute of Power Electronics | 2015

Operation modes and Protection of VS(Vertical Stabilization) Converter for International Thermonuclear Experimental Reactor

Hyunsik Jo; Jongmin Jo; Jong-Seok Oh; Jae-Hak Suh; Hanju Cha

This study describes the structure and operation modes of vertical stabilization (VS) converter for international thermonuclear experimental reactor (ITER) and proposes a protection method. ITER VS converter supplies voltage (±1000 V)/current (±22.5 kA) to superconducting magnets for plasma current vertical stabilization. A four-quadrant operation must be achieved without zero-current discontinuous section. The operation mode of the VS converter is separated in 12-pulse mode, 6-pulse mode and circulation current mode according to the magnitude of the load current. Protection measures, such as bypass and discharge, are proposed for abnormal conditions, such as over current, over voltage, short circuit, and voltage sag. VS converter output voltage is controlled to satisfy voltage response time within 20 msec. Bypass operation is completed within 60 msec and discharge operation is performed successfully. The feasibility of the proposed control algorithm and protection measure is verified by assembling a real controller and implementing a power system including the VS converter in RTDS for a hardware-in-loop (HIL) facility.

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Hanju Cha

Chungnam National University

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Ilyong Lee

Chungnam National University

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Jinyong Jeong

Chungnam National University

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Jong-Seok Oh

Pohang University of Science and Technology

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Junwon Lee

Chungnam National University

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Wujong Lee

Chungnam National University

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