I. Peric

Design and technology of DEPFET pixel sensors for linear collider applications

The performance requirements of vertex detectors for future linear collider experiments is very challenging especially for the detectors innermost sensor layers. The DEPleted Field Effect Transistor (DEPFET) combining detector and amplifier operation is capable to meet these requirements. A silicon technology is presented which allows production of large sensor arrays consisting of linear DEPFET detector structures. The envisaged pixel array offers a low noise and low power operation. To ensure a high radiation length a thinning technology based on direct wafer bonding is proposed.

Counting and integrating readout for direct conversion X-ray imaging concept, realization and first prototype measurements

A novel signal processing concept for X-ray imaging with directly converting pixelated semiconductor sensors is presented. The novelty of this approach compared to existing concepts is the combination of charge integration and single photon counting in every single pixel. Simultaneous operation of both signal processing chains extends the dynamic range beyond the limits of the individual schemes and allows determination of the mean photon energy. Medical applications such as X-ray computed tomography can benefit from this additional spectral information through improved contrast and the ability to determine the hardening of the tube spectrum due to attenuation by the scanned object. A prototype chip in 0.35-micrometer technology was successfully tested. The pixel electronics are designed using a low-noise differential current mode logic and provide configurable feedback modes, leakage current compensation and various test circuits. This paper will discuss measurement results of the prototype structures and give details on the circuit design

Active pixel sensors in high-voltage CMOS technologies for ATLAS

High-voltage particle detectors in commercial CMOS technologies are a detector family that allow implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. Their unique property is that the pixel electronic is embedded inside the sensor diodes. For this reason, we refer to this detector type as the smart diode"" array — SDA. In the proof-of-principle phase of the development, we have demonstrated a radiation tolerance of 1015 neq/cm2, nearly 100% detection efficiency and a spatial resolution of about 3 μm. Thanks to its high radiation tolerance, the SDA technology represents an interesting option for sLHC upgrades or CLIC detector readout. In order to test the concept, within ATLAS-upgrade R&D, we are currently studying an active pixel detector demonstrator HV2FEI4, implemented in AMS 180 nm high-voltage process. The contacts between the detector- and readout chip can be established either capacitively or by bump-bonding.

Fast Self Triggered Multi Channel Readout ASIC for Time- and Energy Measurement

We present a 16-channel self triggered readout chip for simultaneous time and energy measurement, suitable for a wide range of applications. All circuit elements required for detector readout are integrated on the chip. A fast, low-noise discriminator detects hits at the differential inputs. The events are time stamped with an electronic resolution of 15 ps (single channel rms). The timing range is virtually infinite by means of a coarse counter and an overflow indicator. In parallel to the time stamping of the discriminated input signal, the analog input is integrated during a programmable time window and digitized with 8-bit integral resolution. Readout is achieved through a simple serial protocol. Several chips can be synchronized by means of a built in PLL circuit locking to a common reference clock. The 3 times 3 mm2 chip has been fabricated in 0.18 mum technology, employing a differential logic for all crucial parts. Possible applications of this ASIC are in the fields of high energy physics experiments, medical imaging, range finding, georadar and others.

A DEPFET Based Beam Telescope With Submicron Precision Capability

For the detection of secondary vertices of long lived particles containing bottom and charm quarks at the International Linear Collider (ILC), a DEPFET pixel detector is one of the technologically favored options. In a DEPFET sensor a MOSFET pixel detector is integrated on a sidewards depleted silicon bulk sensor, thus combining the advantages of a fully depleted silicon sensor with in-pixel amplification. DEPFET pixel matrices have been characterized in a high energy particle beam. Since the DEPFET is a very high precision device, given its large S/N (> 100) and small pixel size (36 × 22 ¿m2), a DEPFET based pixel telescope consisting of 5 DEPFETs has been developed. The uncertainty on the predicted position for a device under test (DUT) positioned inside the telescope was found to be 1.4 ¿m with the existing device, due to the limited performance of two of the five DEPFET planes. A DEPFET telescope built of 5 modules equivalent to the best plane presented here, would have a track extrapolation error as low as 0.65 ¿m at the DUT plane.

DEPMOSFET active pixel sensor prototypes for the XEUS wide field imager

Active pixel sensors (APS) based on the DEPMOSFET (depleted p-channel MOSFET) recently produced at the MPI semiconductor laboratory are a promising new type of sensor to cope with the advanced requirements of the XEUS wide field imager. DEPMOSFET APS combine high energy resolution and random accessibility of pixels providing for highly flexible readout modes with fast readout speed. In the first prototype production, several design variants of 64 /spl times/ 64 pixel DEPMOSFET matrices with a pixel size of 75 /spl times/ 75 /spl mu/m/sup 2/ have been realized. A data acquisition system (DAQ) for evaluation of sensor prototypes has been developed, which allows for a performance characterization of the different designs. For operation, DEPMOSFET device, front-end IC and control ICs are integrated onto a readout hybrid. Device readout is done row by row, addressing and resetting one single matrix row at a time and processing the signals with a 64 channel parallel CMOS amplifier / multiplexer IC of the CAMEX type applying 8-fold correlated double sampling. Addressing and resetting of the matrix rows is done by two control ICs of the SWITCHER type fabricated in a high voltage CMOS technology. A number of readout hybrids has been built, the characterization of the different devices in terms of noise, spectral resolution and charge collection efficiency is in progress. The most promising DEPMOSFET matrix design variants, the DAQ system and measured key performance parameters of the devices are presented.

New results on DEPFET pixel detectors for radiation imaging and high energy particle detection

DEPFET pixel detectors are unique devices in terms of energy and spatial resolution because very low noise (ENC = 2.2e at room temperature) operation can be obtained by implementing the amplifying transistor in the pixel cell itself. Full DEPFET pixel matrices have been built and operated for autoradiographical imaging with imaging resolutions of 4.3 /spl plusmn/ 0.7 lp/mm at 22 keV. For applications in low energy X-ray astronomy the high energy resolution of DEPFET detectors is attractive. For particle physics, DEPFET pixels are interesting as low material detectors with high spatial resolution. For a Linear Collider detector the readout must be very fast. New readout chips have been designed and produced for the development of a DEPFET module for a pixel detector at the proposed TESLA collider (520 /spl times/ 4000 pixels) with 50 MHz line rate and 25 kHz frame rate. The circuitry contains current memory cells and current hit scanners for fast pedestal subtraction and sparsified readout. The imaging performance of DEPFET devices as well as present achievements towards a DEPFET vertex detector for a Linear Collider are presented.

Electrical characteristics of silicon pixel detectors

Prototype sensors for the ATLAS silicon pixel detector have been electrically characterized. The current and voltage characteristics, charge-collection efficiencies, and resolutions have been examined. Devices were fabricated on oxygenated and standard detector-grade silicon wafers. Results from prototypes which examine p-stop and standard and moderated p-spray isolation are presented for a variety of geometrical options. Some of the comparisons relate unirradiated sensors with those that have received fluences relevant to LHC operation.

DEPFET Active Pixel Detectors for a Future Linear

The DEPFET collaboration develops highly granular, ultra-transparent active pixel detectors for high-performance vertex reconstruction at future collider experiments. The characterization of detector prototypes has proven that the key principle, the integration of a first amplification stage in a detector-grade sensor material, can provide a comfortable signal to noise ratio of over 40 for a sensor thickness of 50-75 μm. ASICs have been designed and produced to operate a DEPFET pixel detector with the required read-out speed. A complete detector concept is being developed, including solutions for mechanical support, cooling, and services. In this paper, the status of the DEPFET R & D project is reviewed in the light of the requirements of the vertex detector at a future linear e+e- collider.

e^{+}e^{-}

A hybrid pixel particle-detector which does not require bump-interconnection is presented. The sensor signals are transmitted from the sensor to the readout chip using capacitive (AC) coupling. In order to facilitate the signal transmission, simple preamplifiers are implemented in the sensor pixels. The sensor chip with 100% fill-factor and in-pixel amplification is implemented in a standard high-voltage CMOS technology. Depleted high-voltage n-well/p-substrate diodes are used as sensors. CMOS charge-sensitive amplifiers are placed inside the sensor-collecting electrodes (n-wells) using twin-wells. The outputs of the preamplifiers are connected to transmitter electrodes implemented in the top metal-layer of the sensor chip. The inputs of the receivers in the readout chip are also connected to electrodes in the top metal-layer. When the readout chip is precisely flipped and glued onto the sensor chip, the sensor- and receiver electrodes form capacitors that allow AC signal transmission. The first test results obtained with a small test-matrix containing 14 times 14 pixels of 78 times 60 mum2-size are presented. Noise, threshold dispersion and radioactive source spectra are measured.