I. Slama-Belkhodja

State Observer-Based Sensor Fault Detection and Isolation, and Fault Tolerant Control of a Single-Phase PWM Rectifier for Electric Railway Traction

This paper presents an easy and a robust sensor fault detection and isolation (FDI) and fault tolerant control (FTC) of a single phase PWM rectifier for electrical railway traction application. Catenary current sensor and dc link voltage sensor failures are considered. The FDI method is based on observers and residual generation. The different FDI algorithm steps allow a good detection and isolation of the sensor fault and identify the faulty sensor. The reconfiguration strategy consists of two steps with open loop control and closed loop control working. Simulation results are presented to illustrate the good performance of the FTC procedure. Experimental results are also presented to show the effectiveness of the proposed FDI and FTC algorithms and good performances of the rectifier after the reconfiguration.

Presentation of an efficient design methodology for FPGA implementation of control systems. Application to the design of an antiwindup PI controller

This paper presents an efficient design methodology to develop IP-core functions in VHDL for control systems. This methodology is able to cope with different optimization constraints such as the reduction of both the development time and the execution time and the minimization of the consumed resources of the chip. Our approach uses the AAA methodology (algorithm architecture adequation), which allows to rapidly develop and optimize the implantation of the DFG (data flow graph) of an algorithm. In order to illustrate the efficiency of this methodology, the authors present the implantation of an antiwindup PI controller on a single field programmable gate array (FPGA) applied to the control of a DC/DC converter.

FPGA implementation of Power Electronic Converter real-time model

Real-time simulation of Power Electronic Converters (PECs) allows a first realistic validation of their digital controllers and avoids experimental constrains (cost, damage risks, reliability ...). However, to increase the realism of validation, the real-time model has to reach a high level of accuracy. This objective is balanced by, among others, the computational time ensured by the used digital technology. This is one of the main reasons why Field Programmable Gate Array (FPGA) devices are preferred. The proposed paper summarizes the hardware FPGA design of PECs real-time model. The Associate Discrete Circuit (ADC) modeling technique is used for each power switch. To make the necessary functional validation, the Matlab/Simulink SimPowerSystems based model has been taken as a reference design. The proposed case study consists of a H-bridge DC-AC converter that supplies an AC load with a sinusoidal back-EMF. The corresponding FPGA-based real-time model is validated at open loop condition and at closed loop with a digital current controller. In addition to functional simulation results, real-time Hardware In the Loop (HIL) simulation results are provided.

Simple Low-Speed Sensorless Dual DTC for Double Fed Induction Machine Drive

In this paper, a doubly fed induction machine (DFIM) operating in motor mode and supplied by two voltage source inverters-in stator and rotor sides-is presented. The aim is to analyze the sensorless rotor position operation of a dual direct torque control (DDTC) of the DFIM. This paper presents a sensorless DDTC for a DFIM speed drive in order to guarantee the static and dynamic system performances. The sensorless DFIM operation provides an analytical redundancy in the case of mechanical sensor failure and ensures the service continuity of the drive. SABER simulation and experimental results illustrate the satisfactory behavior of the system with or without the use of the rotor position sensor. These confirm the preservation of system performances, particularly during the low-speed sensorless control operation. The proposed solution is particularly relevant due to its simplicity.

FPGA-based implementation of DTSFC and DTRFC algorithms

In this paper, authors present a FPGA-based implementation of direct torque and stator flux control (DTSFC) and direct torque and rotor flux control (DTRFC) with and without use of space vector modulation (SVM) for induction motor drives. Indeed, due to their similar structures but also their differences, this set of algorithms is a good example to show the effectiveness of a FPGA-based modular approach to implement sensorless control induction motor drives. Therefore, the chosen solution is based on a custom hardware architecture designed by assembling a set of building blocks. These blocks are tested and organized in a library of intellectual property (IP) modules for easy re-use. Each block is geared toward specific algorithm function (flux estimator, hysteresis controller...). Besides, a special attention is given to the algorithm refinement which allows finding the optimum fixed-point data word length. Finally experimental results are shown which validate the proposed approach.

Power distribution law in a Doubly Fed Induction Machine

The paper deals with a Doubly Fed Induction Machine (DFIM). It presents a study of an active power distribution law between stator and rotor sides. The DFIM is supplied by two voltages PWM inverters in stator and rotor. The power distribution law imposes a relation between rotoric and statoric pulsations. Due to this relation, a new variation structure of the DFIM speed control is presented. The four quadrants working are considered. Simulation results under Matlab-Simulink illustrate the performances of the power distribution law.

A Fault Tolerant Operating System in a Doubly Fed Induction Machine Under Inverter Short-circuit Faults

This paper presents an original strategy of fault tolerant operating in case of doubly fed induction machine (DFIM). The considered fault is short-circuit of inverters leg (T1 and T2). The proposed strategy permits the reconfiguration management of both inverter topology and DFIM field oriented control. Consequently, the drive continuous operation is guaranteed in the presence of the damaged inverter. Simulation results are presented to emphasize the effectiveness of the proposed method

DFIM vector control sensitivity with current sensor faults

Purpose – The purpose of this paper is to present a doubly fed induction machine (DFIM) operating in motor mode and supplied by two voltage source inverters (in stator and rotor sides).Design/methodology/approach – The aim is to analyze the current sensor fault effects on the stator flux‐oriented control according to the current input‐output decoupling. This justifies the necessity of a reconfiguration control in order to satisfy the system service continuity. Also, a theoretical development of sensitivity coefficients gives an idea about control robustness toward a current sensor fault.Findings – This paper emphasizes the system performance close dependency to the current sensor outputs accuracy. Moreover, simulation results point out the operation system deterioration in case of current sensor fault, which leads in most cases to its shut down in contrast with the industrial expectations. In this paper, the suggested solution is the DFIM speed drive control reconfiguration when a current sensor fault occ...

FPGA implementation of a synchronous motor real-time emulator based on delta operator

The aim of this paper is to examine the advantages of using delta-operator to design a digital system emulator for the real-time Hardware-In-the-Loop (HIL) simulation of an AC drive application. A synchronous motor has been taken as a case study. To suit high accuracy and increase the realism of the test, the use of high sampling frequency is crucial. A comparison with a classical shift-operator based emulator is made in terms of precision and stability of the system. The continuous-time state-space model of the motor has been taken as reference. The influence of the sampling period and the fixed-point arithmetic is quantified. To achieve a high computational time, an FPGA target has been chosen for implementing the real-time emulator (RTE). The design and the functional validation of the developed FPGA-based hardware architecture are presented. Finally, an HIL validation of an FPGA-based hysteresis current controller for synchronous motor drive is achieved. This validation is carried out using the developed synchronous motor RTE based on delta-operator.

Enhanced parity equations method for sensor fault detection in electrical drives

This paper focuses on sensor fault detection and isolation (FDI) problem by enhancement of a parity space approach. Indeed, faulty sensor can degrade overall system performances, especially in electrical drives where inner current control loops are very fast and based on sensors outputs. Parity space theory is investigated in the context of general FDI algorithm generation for second-order systems, which are typically used for electrical drives analysis, by starting from higher-order models. The study focuses on simplifications introduced by real-time implementation considerations. A simple and fast algorithm is derived when sampling time is very low, which allows the integration of the FDI algorithm between two consecutive control sampling times. Moreover, the proposed algorithm is insensitive to motor parameters variations and available for any kind of sensor giving an output electrical signal. The development is illustrated with the case of a DC drive. Simulation results are given to demonstrate the effectiveness of the proposed approach.