Ichiro Yoshii

A highly reliable metal-to-metal antifuse for high-speed field programmable gate arrays

This paper describes a novel metal-to-metal antifuse technology for field programmable gate arrays which achieves very high performance and reliability while maintaining full CMOS compatibility. Plasma-CVD SiN with Si/N=1 and Al covered with TiN are used as an antifuse dielectric and electrodes, respectively. This structure allows a desirable characteristics for high-speed FPGAs with off-state reliability of 1.7/spl times/10/sup 5/ years.<<ETX>>

FT-IR-ATR observation of SiOH and SiH in the oxide layer on an Si wafer

FT-IR-ATR (Fourier transform infrared attenuated total reflectance) technique was used to measure the SiOH and SiH contents in the thermal oxide films grown on Si wafers. It was found that the SiOH groups in the bulk could be eliminated by low temperature annealing, whereas SiOH at the Si/SiO2 interface could only be removed by high temperature annealing. It was also found that gamma ray irradiation generated SiOH and SiH in the thin oxide film.

Relation between stress-induced leakage current and dielectric breakdown in SiN-based antifuses

Degradation process of metal-to-metal antifuses which use thin silicon nitride as dielectric layer under high field stress is studied in detail. Prior to dielectric breakdown, leakage current at stress voltage increases with large and complex fluctuations for any sample. So-called stress-induced leakage current at low voltages in current-voltage characteristics is also observed and it increases as the stress continues. It is shown that the stress-induced leakage current and the pre-breakdown leakage current with fluctuations are identical phenomena, and that the stress-induced leakage current strongly relates to the dielectric breakdown. Therefore,it is important to understand the mechanism of the stress-induced leakage current in order to improve antifuse reliabilities. Discrete two-step fluctuations on the stress-induced leakage currents at low voltages are found and the stress-induced leakage current is not proportional to antifuse areas. Considering these findings, it is concluded that the stress-induced leakage current flows through local spots. The conduction mechanism of the stress-induced leakage currents is also studied. The main conduction process in SiN films appears to be Frenkel-Poole conduction. We also find that as the stress continues, the barrier height between an electrode and a SiN film becomes lower and the dielectric constant becomes larger. It is also found that the appearance of the stress-induced leakage current in the I-V characteristics depends on the thickness of the barrier metal. Dielectric breakdown electric field and TDDB lifetime also show the same dependence. Considering the experimental results, the stress-leakage current is related to the electrode material.<<ETX>>

Total-dose characterization of a high-performance radiation-hardened 1.0- mu m CMOS sea-of-gates technology

A radiation-hardened CMOS sea-of-gates technology with 1.0- mu m geometry is developed which is fully compatible with commercial technologies. Total-dose and postirradiation effects are investigated in detail on transistors and circuits designed on a 2K-gate test chip. The data show that this technology is radiation hardened up to a total dose of 1 Mrad(SiO/sub 2/) and may be functional at 10 Mrad(SiO/sub 2/). Moreover, using a simple analytic model for switching of CMOS circuits, it is shown that the changes in circuit performance are well correlated with those in transistor characteristics. >

Relation between Stress-Induced Leakage Current and Dielectric Breakdown in SiN-Based Antifuses

We report on the degradation process of metal-to-metal antifuses that use thin silicon nitride film as the dielectric layer under high electric field stress. Stress-induced leakage current was observed in all samples, and it flows through local spots. Two-level fluctuations were found on the leakage current well below the stress voltage, and large and complex fluctuations were observed near the stress voltage. The conduction mechanism of the stress-induced leakage current was the Poole-Frenkel type. It was found that the dielectric constant of the path became large and that the breakdown and the anomalous current depended on the barrier metal thickness. Considering these results, the stress-induced leakage current and the breakdown are thought to be caused by electromigration of electrode material to the SiN film.

Role of hydrogen at poly-Si/SiO/sub 2/ interface in trap generation by substrate hot-electron injection

The authors investigated trap generation by substrate hot-electron injection for MOS devices in which hydrogen was intentionally incorporated by forming gas anneal. It was found that the high-temperature forming gas anneal significantly enhances both interface and oxide trap generation at oxide fields during injection above 4 MV/cm, while no enhancement has been observed below 3 MV/cm. It was also found from secondary ion mass spectroscopy (SIMS) measurements that the forming gas anneal increases the hydrogen concentration at the poly-Si/SiO/sub 2/ interface but not in the gate oxide nor at the SiO/sub 2//Si interface. Based on these experimental results, a novel trap generation model, in which hydrogen released from Si-H at the poly-Si/SiO/sub 2/ interface by hot electrons causes the enhanced trap generation, is proposed.<<ETX>>

A novel in-process wafer-level screening technique for CMOS devices

We have developed a novel in-process wafer-level screening technique to eliminate CMOS device infant mortality due to gate oxide defects. Using this technique, it is possible to stress all gate oxides simultaneously at an arbitrary high voltage for both n-channel and p-channel transistors. This paper describes the details of the screening method and its application to the standard 0.8 /spl mu/m CMOS logic technology. The result shows that early TDDB failures are significantly reduced by this technique.