Ignacio Bravo

Directional People Counter Based on Head Tracking

This paper presents an application for counting people through a single fixed camera. This system performs the count distinction between input and output of people moving through the supervised area. The counter requires two steps: detection and tracking. The detection is based on finding peoples heads through preprocessed image correlation with several circular patterns. Tracking is made through the application of a Kalman filter to determine the trajectory of the candidates. Finally, the system updates the counters based on the direction of the trajectories. Different tests using a set of real video sequences taken from different indoor areas give results ranging between 87% and 98% accuracies depending on the volume of flow of people crossing the counting zone. Problematic situations, such as occlusions, people grouped in different ways, scene luminance changes, etc., were used to validate the performance of the system.

Implementation in Fpgas of Jacobi Method to Solve the Eigenvalue and Eigenvector Problem

This work shows a modular architecture based on FPGAs to solve the eigenvalue problem according to the Jacobi method. This method is able to solve the eigenvalues and eigenvectors concurrently. The main contribution of this work is the low execution time compared with other sequential algorithms, and minimal internal FPGA consumed resources, mainly due to the fact of using the CORDIC algorithm. Two CORDIC modules have been designed to solve the trigonometric operations involved. A parallel CORDIC architecture is proposed as it is the best option to compute the eigenvalues with this method. Both CORDIC modules can work in rotation and vector mode. The whole system has been done in VHDL language, attempting to optimize the design.

Novel HW Architecture Based on FPGAs Oriented to Solve the Eigen Problem

A hardware solution is presented to obtain the eigenvalues and eigenvectors of a real and symmetrical matrix using field-programmable gate arrays (FPGAs). Currently, this system is used to compute the eigenvalues and eigenvectors in covariance matrices for applications in digital image processing that make use of the principal component analysis (PCA) technique. The proposed solution in this paper is based on the Jacobi method, but in comparison with other related works, it presents a different architecture that remarkably improves execution time, while reducing the number of consumed resources of the FPGA.

Modeling feature distances by orientation driven classifiers for person re-identification

Display Omitted The person orientation is used to learn different inter-camera transformations.We propose a method to retrieve images of the person with different orientations.The pairwise feature dissimilarities space is used to create two regions according to the orientation.We train a binary classifier to capture the inter-camera transformation for each region. To tackle the re-identification challenges existing methods propose to directly match image features or to learn the transformation of features that undergoes between two cameras. Other methods learn optimal similarity measures. However, the performance of all these methods are strongly dependent from the person pose and orientation. We focus on this aspect and introduce three main contributions to the field: (i) to propose a method to extract multiple frames of the same person with different orientations in order to capture the complete person appearance; (ii) to learn the pairwise feature dissimilarities space (PFDS) formed by the subspaces of similar and different image pair orientations; and (iii) within each subspace, a classifier is trained to capture the multi-modal inter-camera transformation of pairwise image dissimilarities and to discriminate between positive and negative pairs. The experiments show the superior performance of the proposed approach with respect to state-of-the-art methods using two publicly available benchmark datasets.

An Intelligent Architecture Based on Field Programmable Gate Arrays Designed to Detect Moving Objects by Using Principal Component Analysis

This paper presents a complete implementation of the Principal Component Analysis (PCA) algorithm in Field Programmable Gate Array (FPGA) devices applied to high rate background segmentation of images. The classical sequential execution of different parts of the PCA algorithm has been parallelized. This parallelization has led to the specific development and implementation in hardware of the different stages of PCA, such as computation of the correlation matrix, matrix diagonalization using the Jacobi method and subspace projections of images. On the application side, the paper presents a motion detection algorithm, also entirely implemented on the FPGA, and based on the developed PCA core. This consists of dynamically thresholding the differences between the input image and the one obtained by expressing the input image using the PCA linear subspace previously obtained as a background model. The proposal achieves a high ratio of processed images (up to 120 frames per second) and high quality segmentation results, with a completely embedded and reliable hardware architecture based on commercial CMOS sensors and FPGA devices.

Tracking People Motion Based on Extended Condensation Algorithm

People counting systems are widely used in surveillance applications. In this paper, we present a solution to bidirectional people counting based on information provided by an overhead stereo system. Four fundamental aspects can be identified: the detection and tracking of human motion using an extended particle filter, the use of 3-D measurements in order to increase the systems robustness and a modified K-means algorithm to provide the number of hypotheses at each time, and, finally, trajectory generation to facilitate people counting in different directions. The proposed algorithm is designed to solve problems of occlusion, without counting objects such as shopping trolleys or bags. A processing ratio of around 30 frames/s is necessary in order to capture the real-time trajectory of people and obtain robust tracking results. We validated various test videos, achieving a hit rate between 95% and 99%, depending on the number of people crossing the counting area.

Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing

This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely.

Different Proposals to Matrix Multiplication Based on FPGAS

Matrix multiplication is a typical operation in different engineering areas, such as signal or image processing. This paper makes a brief description about some matrix multiplication proposals when working in FPGAs (field programmable gate array). Thanks to their low prices and low costs, currently these devices are used in many and different applications. There are some alternative methods that optimize execution time to carry out this operation under FPGAs. The internal structure of these devices allows parallel execution of matrix multiplication. However, a systolic structure needs many internal resources such as embedded multipliers and often it cannot be used because of the low number of embedded multipliers in the used device. This structure is commonly used in FPGAs for small size matrices. However our proposed alternatives allow an efficient multiplication of matrices of sizes as big as 512 times 512 elements. The study done in this work compares the delay and area consumed of different matrix multiplication algorithms.

Discriminant Context Information Analysis for Post-Ranking Person Re-Identification

Existing approaches for person re-identification are mainly based on creating distinctive representations or on learning optimal metrics. The achieved results are then provided in the form of a list of ranked matching persons. It often happens that the true match is not ranked first but it is in the first positions. This is mostly due to the visual ambiguities shared between the true match and other “similar” persons. At the current state, there is a lack of a study of such visual ambiguities which limit the re-identification performance within the first ranks. We believe that an analysis of the similar appearances of the first ranks can be helpful in detecting, hence removing, such visual ambiguities. We propose to achieve such a goal by introducing an unsupervised post-ranking framework. Once the initial ranking is available, content and context sets are extracted. Then, these are exploited to remove the visual ambiguities and to obtain the discriminant feature space which is finally exploited to compute the new ranking. An in-depth analysis of the performance achieved on three public benchmark data sets support our believes. For every data set, the proposed method remarkably improves the first ranks results and outperforms the state-of-the-art approaches.

Power Measurement Methods for Energy Efficient Applications

Energy consumption constraints on computing systems are more important than ever. Maintenance costs for high performance systems are limiting the applicability of processing devices with large dissipation power. New solutions are needed to increase both the computation capability and the power efficiency. Moreover, energy efficient applications should balance performance vs. consumption. Therefore power data of components are important. This work presents the most remarkable alternatives to measure the power consumption of different types of computing systems, describing the advantages and limitations of available power measurement systems. Finally, a methodology is proposed to select the right power consumption measurement system taking into account precision of the measure, scalability and controllability of the acquisition system.