Ingo Koehler

20% efficient screen printed LBSF cell fabricated using UV laser for rear dielectric removal

Low-cost high efficiency solar cells are the key to achieving grid parity with photovoltaic devices. Laser processing in silicon photovoltaics is being incorporated at various stages to achieve this target. This paper details the fabrication, characterization and analysis of 4 cm2 screen printed cells with efficiency over 20% achieved using a UV laser ablation for selective opening of rear dielectric. These cells are compared to cells fabricated using a screen printed etching paste for opening vias through the rear dielectric. Microscopy was used to examine the impact of laser pulses on the silicon surface and quality of the BSF and compare it with vias opened using etching paste. Characterization and analysis of these cells is performed using IQE measurements and supported by PC1D modeling. It was found that while laser ablation had an effect on the morphology of the silicon surface, the overall quality of the local back surface field and dielectric rear passivation were maintained, resulting in high cell efficiencies and VOC.

Fabrication of 20 % efficient cells using spin-on based simultaneous diffusion and dielectric anneal

Low-cost high efficiency solar cells are the key to achieving grid parity with photovoltaic devices. This paper details the fabrication, characterization and analysis of 4 cm2 screen printed cells with efficiency over 20% achieved using a local back surface field cell structure in conjunction with a 75 ohm/sq emitter and efficient back surface reflector. A streamlined process sequence involving a single high temperature step for simultaneous formation of emitter and rear passivation was used. The combination of LBSF and improved rear reflector resulted in a peak efficiency of 20.1% with JSC of 39.4 mA/cm2 and VOC of 652 mV. Detailed characterization and modeling involving IQE and escape reflectance measurements revealed that the increase in VOC and JSC was the result of increased BSR from 67% to 93% and reduced BSRV from 325 cm/s to 125 cm/s. Improved rear passivation was found to be an effective method for controlling charge-induced inversion or parasitic shunting at the rear surface. Future experiments and further optimization are expected to result in efficiencies of over 20% on thin wafers using a similar cell structure.

Understanding and Fabrication of 20% Efficient Cells Using Spin-on-Based Simultaneous Diffusion and Dielectric Passivation

Low-cost high-efficiency solar cells are the key to achieve grid parity with photovoltaic devices. High-quality rear passivation is essential for the achievement of this goal. Thick thermal oxide is known to provide the required back surface passivation, but it can lead to long process steps at a high temperature. A combination of 2-D simulations and experiments is used to identify a dielectric stack that provides passivation comparable with that of a thick thermal oxide. This dielectric stack, in conjunction with a local back surface field and 75-Ω/sq emitter, produced solar cell efficiency exceeding 20%. In addition, a streamlined process sequence, involving a single high temperature step for simultaneous formation of emitter and rear passivation, is used. The peak efficiency of 20.1% was achieved with JSC of 39.4 mA/cm2 and VOC of 652 mV on float zone wafers of 2.3 Ω·cm resistivity. Detailed characterization and modeling revealed that the increase in VOC and JSC is the result of increased back surface reflectance from 67% to 93% and reduced back surface recombination velocity from 325 to 125 cm/s. Improved rear passivation was found to be an effective method to control charge-induced inversion or parasitic shunting at the rear surface. According to model calculations, further optimization can result in efficiencies of over 20% on much thinner wafers (~100 μm) using an identical cell structure.

Enhanced Front and Rear dielectric passivation for commercially grown Czochralski silicon for high efficiency solar cells

Commercial silicon solar cell efficiencies have been improving consistently over the last few years with the implementation of novel techniques. Along with larger wafer area and thinner substrates, low-cost processing of high efficiency solar cells can help achieve grid parity using crystalline silicon. In this work, large area cells were fabricated using conventional diffusion, oxidation and screen printing technologies. Several rear passivation schemes were compared to achieve low rear surface recombination velocities and combined with good front passivation to obtain cell VOC of ∼650 mV. Cells fabricated using these schemes resulted in an efficiency of 19.7% on 4 cm2 cells and 18.5% on 62 cm2 cells. Analysis and characterization of these cells reveals the possibility of achieving cell efficiencies greater than 19% on large area substrates.