Isaac D. Scherson

Parallel sorting in two-dimensional VLSI models of computation

The gradual refinement of a general approach to two-dimensional sorting, the shear-sort algorithm, to more sophisticated and specialized sorting algorithms on mesh-connected computers is described. The analysis of the shear-sort algorithm gives rise to a novel perspective of two-dimensional sorting, which seems to be a very powerful tool for developing efficient algorithms. The same methods can be extended for sorting in higher dimensions, for example, in the three-dimensional mesh. The concept of clean and dirty rows can be modified to clean and dirty planes (or hyperplanes for dimensions greater than three). Although only two schemes (purely recursive and iterative) are explicitly described, the reader may construct his own algorithm using similar technique and slight modifications. Designing an O(n) algorithm for sorting on a mesh becomes much simpler using the techniques developed. >

The distance bound for sorting on mesh-connected processor arrays is tight

In this paper, We consider the problem of sorting n2 numbers, initially distributed randomly in an n × n mesh-connected processor array with one element per processor. We show a lower bound, based on distance arguments, of 4n routing steps on mesh-connected processors operating in an SIMD mode with no wraparounds in rows or columns, We present an algorithm using a novel approach, which is optimal upto the conslant of the leading term, and hence, succeed in proving the tightness of the lower bound based on distance. Keeping in mind the practical difficulties in implementation of this algorithm, we also present an extremely practical O(n) algorithm amenable for VLSI implementation and for existing mesh- connected computers. All the results in this paper were derived by using a new method of analysis inspired by the discovery of shear-sort or row-column sort.

Analysis and applications of the orthogonal access multiprocessor

Abstract An Orthogonal Access Multiprocessing system allows a multiplicity of processors to access distinct rows or columns of a rectangular array of data elements concurrently. The resulting tightly coupled system is feasible with current technology and has been suggested for VLSI as a “reduced mesh.” In this paper we introduce the architecture and concentrate on its application to a number of basic vector and numerical computations. We prove that the machine exhibits the same performance as any other system with the same number of processors within a factor of 3. Matrix multiplication, LU decomposition, polynomial evaluation, and solutions to linear systems and partial differential equations all show a speedup of O ( n ) for an n -processor system. The flexibility in the choice of the number of PEs makes the architecture a strong competitor in the world of special-purpose parallel systems.

Efficient traversal of well-behaved hierarchical trees of extents for ray-tracing complex scenes

Traversal of hierarchial trees of extents (HTE) requires computation of intersections between rays and bounding volumes whose faces are parallel to the cartesian axes. By redefining the HTE so that nonoverlapping bounding volumes are generated, a well-behaved data structure is obtained in which “geometrical coherence” is applied to speed up its traversal. We distinguish two types of bounding volumes: internal boxes contain the rays origin whileexternal bounding volumes do not contain the rays origin. To traverse the HTE, we look first to polygons in the internal bounding volumes and deal with external boxes only when no ray-polygon intersection is found in internal nodes. As external nodes in the HTE define pruned subtrees of external bounding volumes, geometrical characteristics of the boxes are exploited for HTE traversal. A coding scheme allows a 6-bit code to determine which faces of a bounding volume need to be tested for intersection. Also, our well-behaved HTE allows for reuse of intersection points at lower levels of the tree.

Definition and analysis of a class of spanning bus orthogonal multiprocessing systems

A graph theoretical representation for a class of interconnection networks is suggested. The idea is based on a definition of orthogonal binary vectors and leads to a construction rule for a class of orthogonal graphs. An orthogonal graph is first defined as a set of 2<supscrpt><italic>m</italic></supscrpt> nodes, which in turn are linked by 2<supscrpt><italic>m-n</italic></supscrpt> edges for every <italic>link mode</italic> defined in an integer set <italic>Q</italic>*. The degree and diameter of an orthogonal graph are determined in terms of the parameters <italic>n</italic>, <italic>m</italic> and the number of link modes defined in <italic>Q</italic>*. Routing in orthogonal graphs is shown to reduce to the <italic>node covering</italic> problem in bipartite graphs. The proposed theory is applied to describe a number of well known interconnection networks such as the binary <italic>m</italic>-cube and spanning-bus meshes. Multi-dimensional access (MDA) memories are shown as examples of orthogonal shared memory multi-processing systems.

Multi-operand arithmetic in a partitioned associative architecture

Abstract Multi-operand associative techniques attain their full power in algorithms where the data may be recast into disjoint data sets, all acted upon concurrently, each by a different operand common to the set. But the multi-operand approach can also serve to enhance arithmetic operations significantly. The speed-up of associative multiplication by handling a number of multiplier bits at a time is described and analyzed, including an effective algorithm for limited sum of products. The most complex process treated is convolution, which serves to illustrate the enhancement of an extended sum of products. Any number of vectors stored in memory can be convolved simultaneously by a common filter vector. Execution time is 45 msec for 1024 element data and filter vectors, 2048 element results, and 16-bit precision.

Direct simulation of yeast 2-μm circle plasmid amplification

The 2-μm circle is a plasmid found in most strains of the yeast Saccharomyces cerevisiae at approximately 60–100 copies per cell. The plasmid possesses the novel capacity for replicative amplification induced by site-specific recombination. To address the question of whether the recombination model is adequate to account for observed rates of 2-μm circle amplification, we developed a direct computational simulation of the amplification system. Results of this simulation show that theoretically at least six copies per plasmid can be produced in each generation, and that previously unanticipated replication intermediates contribute largely to this degree of amplification.