Isao Makabe

Epitaxial graphene formation on 3C-SiC/Si thin films

By forming a thin 3C-SiC film on Si substrates and by annealing it at ~1500 K in vacuo, few-layer graphene is formed epitaxially on Si substrates. In this graphene-on-silicon (GOS) technology, graphene grows at least on three major low-index Si surfaces: (1 1 1), (1 0 0) and (1 1 0), which allows tuning of structural and electronic properties of epitaxial graphene by simply controlling the crystallographic orientation of the surface. A typical example can be found in the two types of graphene formed on 3C-SiC(1 1 1) surfaces; the one on 3C-SiC(1 1 1)/Si(1 1 1) shows a Bernal stacking with an interfacial buffer layer, while the one on 3C-SiC(1 1 1)/Si(1 1 0) shows a non-Bernal stacking without an interfacial buffer layer. Inserting an AlN interlayer between Si and 3C-SiC significantly contributes to improvement of the GOS quality. Moreover, thanks to the sealing effect of the AlN layer against Si out-diffusion, we can apply chemomechanical polishing of SiC surface to reduce the surface roughness, which can further accentuate the effect of H2 annealing of the surface. As a result, a D to G band intensity ratio as low as 0.4 is obtained.

High Quality Graphene Formation on 3C-SiC/4H-AlN/Si Heterostructure

The growth of graphene on 3C-SiC/Si heterostructure is a promising approach, which provides low production cost, high scalability and easiness of nanoelectromechanical system fabrication. However, the quality of graphene is still insufficient for device applications due to mediocre morphological and structural quality of the 3C-SiC epilayers compared to bulk SiC crystals and to excessive Si out-diffusion from the Si substrate. Here, we propose a solution of inserting a 4H-AlN layer between 3C-SiC and Si, which allows us to polish the 3C-SiC film without worrying about enhancement of the Si out-diffusion despite the thinning after the polishing. With this insertion, a considerable quality improvement is achieved in our graphene on silicon.