Isao Ohbu

Single-voltage-supply highly efficient E/D dual-gate pseudomorphic double-hetero HEMT's with platinum buried gates

Highly efficient enhance/depletion (E/D) dual-gate HEMTs for use in high-power linear amplifiers with a single biasing supply are demonstrated. These devices include platinum buried gates to realize a single biasing supply. A double-heterostructure and a GaAs/InGaAs/GaAs superlattice channel were adopted to obtain a good linearity and a large gain. An E/D dual-gate field effect transistors (FET) structure is also adopted to improve the gain and efficiency. High output power of 24 dBm, high power gain of 24 dB, and high power-added-efficiency of 46% for the gate width of 4-mm sample were obtained under conditions with a 1.5-GHz Japan Personal Digital Cellular (PDC) standard and with a +3.5 V single biasing supply.

Desorption of Indium during the Growth of GaAs/InGaAs/GaAs Heterostructures by Molecular Beam Epitaxy

The desorption of indium during molecular beam epitaxy (MBE) growth of InGaAs and GaAs/InGaAs/GaAs quantum wells has been investigated by reflection high energy electron diffraction (RHEED). The indium desorption activation energy calculated from the temperature dependence of the InAs growth rate is shown to be almost same as the enthalpy of InAs decomposition. It was found that the RHEED pattern transition time, t1, from (4×2) of InGaAs to (2×4) of GaAs after GaAs heteroepitaxial growth on InGaAs began, was the desorption time of indium, which segregated to the growth front from the topmost layer of InGaAs. The activation energy determined from this process is close to the desorption enthalpy of indium from indium liquid.

Improved hole transport properties of highly strained In0.35Ga0.65As channel double-modulation-doped structures grown by MBE on GaAs

Hole transport properties have been improved by using highly strained In 0.35 Ga 0.65 As channel double-modulation-doped heterostructures grown by molecular beam epitaxy. This structure provided both a high mobility of 354 cm 2 /(V s) and a high sheet hole concentration of 1.23 x 10 12 cm -2 at room temperature. Double-modulation-doped field effect transistors with a 0.4-μm gate length and a 20-μm gate width were fabricated. Transconductance of 118 mS/mm, which is about 1.5 times higher than that of single-modulation-doped field-effect transistors, was obtained at room temperature.

Diffusion of Gallium Vacancies from Low-Temperature-Grown GaAs

Diffusion of crystalline defects from low-temperature-grown GaAs (LT-GaAs) during annealing at 600°C has been studied. Gallium vacancies diffuse from the LT-GaAs layer into an adjacent Si doped GaAs layer, degrading the electrical characteristics of the Si-doped GaAs. An AlxGa1-xAs (x>0.3) barrier inserted between the LT-GaAs and the Si-doped GaAs effectively suppresses the diffusion of gallium vacancies from the LT-GaAs.

An InGaP/GaAs collector-up tunnelling-collector HBT and subtransistor via-hole structure for small and highly efficient power amplifiers

A novel structure of InGaP/GaAs collector-up tunneling-collector heterojunction bipolar transistors (C-up TC-HBTs) with sub-transistor via-holes, for use in small power amplifiers, is presented. Having the via-holes directly under the C-up UBTs is convenient in terms of thermal conduction; power amplifiers composed of multi-finger HBTs in this configuration take up dramatically less area than those with devices in the conventional configuration. The result was the demonstration of thermally stable operation for a 4-finger C-up TC-HBT at up to 0.9 mW//spl mu/m/sup 2/, in spite of the low finger pitch of only 15 /spl mu/m. Moreover, a small 32-finger C-up TC-HBT, with a total area of 0.25 /spl times/ 0.31 mm, was capable of delivering a power-added efficiency of 52% at 24.4 dBm in wide-band CDMA operation. These results show the strong potential for microwave application of high-efficiency power amplifiers composed of C-up TC-HBTs.

High-Performance HEMT with an Offset-Gate Structure for Millimeter-Wave Monolithic Microwave ICs

A process technology for a pseudomorphic high electron mobility transistor (P-HEMT) with an offset-gate structure has been developed for millimeter-wave monolithic microwave ICs (MMICs). A HEMT with the offset-gate structure showed both reduced gate-to-drain capacitance and drain conductance compared with a device with a non-offset-gate structure. The device showed a maximum available gain (MAG) of 9 dB at 77 GHz. The device was applied to a 77 GHz three-stage power amplifier, which showed a small-signal gain of 16.5 dB. Under preliminary life testing, this amplifier showed a stable small-signal gain for over 160 hours of testing at 175°C.

Highly strained In 0.35 Ga 0.65 As/GaAs layers grown by molecular beam epitaxy for high hole mobility transistors

We have grown highly strained In0.35Ga0.65As layers on GaAs substrates by molecular beam epitaxy to improve the performance of high hole mobility transistors (HHMTs). The mobility and sheet hole concentration of double side doped pseudomorphic HHMT structures at room temperature reached 314 cm2/V-s and 1.19 × 1012 cm−2, respectively. Photoluminescence measurements at room temperature show good crystalline quality of the In0.35Ga0.65As layers. This study suggests that the performance of HHMTs can be improved by using high-quality In0.35Ga0.65As layers for the channel of double side doped heterostructures pseudomorphically grown on GaAs substrates.

High-efficiency dual-gate InGaAs pseudomorphic HEMTs for high-power amplifiers using single-voltage supply

High-efficiency InGaAs pseudomorphic HEMTs for high-power amplifiers have been developed. To improve power-added efficiency, we developed a new type of dual-gate structure which consists of an enhancement-mode FET and a depletion-mode FET. A highly reliable platinum buried gate was adopted to obtain a Schottky barrier height of 0.8 eV for the enhancement-mode FET. The power-added efficiency of the new FETs is as much as 10% higher than that of single-gate FETs at 1.5 GHz, and +3 V single-voltage operation is possible.

Backside-emitter-structure C-up GaAs HBTs for small power amplifiers

In this paper, we have successfully fabricated ballast-free HBTs with L of 15 /spl mu/m and V/sub ce,.sat/ of 0.01 V by employing a backside-emitter-structure collector-up (C-up) configuration with ohmic collector contacts. Preliminary results on performance of these HBTs show their strong potential for application in small and highly efficient PA MMICs.

Design of C-up GaAs HBTs with backside emitter for small power amplifiers

Poor thermal conduction of a GaAs substrate in GaAs heterojunction bipolar transistor (HBT) power amplifiers (PAs) previously required thermal designs such as ballast resistors and a large finger pitch (/spl sim/ 30 /spl mu/m). This paper describes the successful fabrication of ballast-free PAs with a small finger pitch (15 /spl mu/m) using a collector-up (C-up) configuration with a backside emitter structure. Having via-holes directly under C-up HBTs is convenient in terms of thermal conduction; PAs composed of multi-finger HBTs in this configuration occupy one-third less area than those with HBTs in the conventional configuration. A small 32-finger C-up HBT we fabricated with a total area of 0.25 /spl times/ 0.31 /spl mu/m/sup 2/ delivered a power-added efficiency of 52% at 24.4 dBm in wide-band CDMA operation. The results show that C-up HBTs with a backside emitter structure have strong potential for microwave high-power application.