Isemi Igarashi

Mechanical property measurements of thin films using load-deflection of composite rectangular membranes

Abstract The internal stress and Youngs modulus of thin films are determined by measuring the deflection versus pressure of rectangular membranes made of them. In order to reduce the measurement error for Youngs modulus due to the unknown Poissons ratio, a 2 mm × 8 mm rectangular membrane is adopted. Measurements are made by using a computerized measurement system. Low-pressure chemical vapor deposition (LPCVD) silicon nitride films are characterized and found to have an internal stress of 1.0 GPa and Youngs moduls of 290 GPa, showing that the rectangular membrane load-deflection technique could be utilized to measure the internal stress and Youngs modulus of films deposited onto LPCVD silicon nitride membranes. By using this composite membrane technique, a LPCVD polysilicon film and a plasma-CVD silicon nitride film are characterized. The internal stress and Youngs modulus are found to be −0.18 GPa and 0.11 GPa for the LPCVD polysilicon film and 0.11 GPa and 210 GPa for the plasma-CVD silicon nitride film, respectively.

Integrated piezoresistive pressure sensor with both voltage and frequency output

Abstract An on-chip integrated piezoresistive pressure sensor with both voltage and frequency outputs has been developed. The sensor chip, having a size of 3 × 3.8 mm 2 , was realized by the use of a standard bipolar IC process. The output voltage span is 1 to 4 V for a pressure range of 0 to 750 mmHg. The pressure sensitivity of the voltage output is 4 mV/mmHg. The non-linearity is less than 0.4 % of the full scale. The sensitivity of the frequency output is about 30 kHz for a 750 mmHg change in pressure. The output is in the T 2 L level. The temperature coefficient of the sensitivity is less than 0.06%/°C in the temperature range −20 to 110 °C.

Tactile image detection using a 1k-element silicon pressure sensor array

Abstract A 32 × 32 (1k)-element silicon pressure sensor array with CMOS processing circuits has been fabricated for the detection of a high-resolution pressure distribution. The sensor array consists of an X – Y matrix organized array of pressure- sensing cells with a spacing of 250 μm; CMOS processing circuits are formed around the array on the same chip. Fabrication of the sensor array is carried out using a 3 μm CMOS process combined with, Si micromachining techniques. The diaphragm size is 50 μm × 50 μm square. The sensor array chip size is 10 mm × 10 mm. The main features of the design for the tactile image detector are the two-line readout system for a full bridge of piezoresistors in each individual cell for noise reduction, and the low power consumption array exciting system with n-MOS power switches selecting the X – Y address in large-scale sensor integration. A tactile image-detecting system is set up for indicating tactile images as visible pictures. The detecting system is provided with functions for signal amplification and offset cancellation. High-resolution tactile images are stably shown as two- or three-dimensional figures on the display through computer processing of the readout data.

Micro-diaphragm pressure sensor

A micro-diaphragm pressure sensor with silicon nitride diaphragm of 80 µm × 80 µm was fabricated by applying micromachining technique. The main feature is that it is a complete planar type pressure sensor formed by single-side processing solely on the top surface of

Mechanical property measurements of thin films using load-deflection of composite rectangular membrane

The internal stress and Youngs modulus of thin films are determined by measuring the deflection versus pressure of the rectangular membranes of materials. In order to reduce the measurement error for the Youngs modulus due to an unknown Poissons ratio, a 2 mm*8 mm rectangular membrane is adopted. Measurements are made by using a computerized measurement system. Low-pressure chemical-vapor-deposited (LPCVD) silicon nitride films are characterized and found to have an internal stress of 1.0 GPa and a Youngs modulus of 290 GPa. By using this composite membrane technique, an LPCVD polysilicon film and a plasma-CVD silicon nitride film are characterized. The internal stress and Youngs modulus were found to be -0.18 GPa and 160 GPa for the LPCVD polysilicon film and 0.11 GPa and 210 GPa for the plasma-CVD silicon nitride film.<<ETX>>

Experimental study on current gain of BSIT

A means to improve the current gain hFSof the BSIT in a high drain current region has been derived from an experimental study about the dependency of the hFSversus drain current relationship on the channel width, the gate junction depth, and the impurity concentration in the n-high-resistivity drain region. The BSIT, designed in this manner and including 9000 channels in a chip of 7 × 10 mm2, exhibits a current gain over 100 and high switching speeds, a rise time of 200 ns, a storage time of 200 ns and a fall time of 25 ns at a drain current of 50 A.

Monolithic pressure-flow sensor

A new silicon-based monolithic pressure-flow sensor has been developed. Its operation is based on the piezoresistive effect for pressure sensing and heat transfer for flow sensing. The sensor chip has a thermal isolation structure that is made of an oxidized porous silicon membrane. This structure thermally isolates the heating element located on the membrane from the rim of the chip. The sensor, in which the chip was mounted on a wall of an acrylate plastic pipe, was designed for biomedical applications. Measurements were made at pressures of 0-300 mmHg, water flow rates of 0-7 1/min, and fluid temperatures of 25-45°C. The temperature difference between the heating element and the fluid temperature sensing element was kept at 5°C. The sensor showed a pressure sensitivity of 1.32 µV/mmHg for 1-mA current supplied, a nonlinearity of 0.5 %F.S. for pressure sensing, an accuracy of ±10 %F.S. for flow sensing, and 90-percent response time of below 100 ms for flow sensing. The sensor was applied to the simultaneous measurements of pressure and flow rate in pulsedflow experimental systems.

ISFET's with ion-sensitive membranes fabricated by ion implantation

Ion sensitive FETs (ISFETs) for sodium ions (Na/sup +/) fabricated by ion-implantation are investigated. The sensing layers are produced by implanting Na/sup +/ ions into the surface of an oxidized Si/sub 3/N/sub 4/ layer through an Al buffer layer deposited beforehand, in order to reduce the damage to the gate insulator of the ISFET during ion implantation. The Na/sup +/ sensitivity, selectivity, repeatability, thermal characteristics, and long-term stability are evaluated. The ISFET responds to Na/sup +/ ions independent of pH within the range of pH 7-10, and the Na/sup +/ sensitivity is nearly Nernstian. The ISFETs repeatability and long-term stability (about 1300 h), suggests that the ion-implantation technique is a suitable method for fabricating a stable ion-sensing layer. >

Very High Speed Static Induction Thyristor

Characteristics of a newly developed static induction thyristor (SIThy) are described. The SIThy is irradiated by 2-MeV protons to improve the switching speed as a result of local carrier lifetime control. The characteristics of the proton irradiated SIThy are controlled by annealing conditions to obtain devices for various applications. The switching speed of the SIThy is very high; for example, at an anode current of 50 A, its rise time, storage time, and fall time are 100 ns, 60 ns, and 50 ns, respectively. Thus the newly developed SIThy is suitable for high-speed switching devices.

Antiphase domains in GaAs grown on a (001)‐oriented Si substrate by molecular‐beam epitaxy

Antiphase domains (APDs) in the GaAs layer grown by molecular‐beam epitaxy on a nominally (001)‐oriented Si substrate were easily observed by molten potassium hydroxide etching or photoelectrochemical etching. The APD boundaries are almost parallel to {100} or {110} planes. The density of APDs decreases with the GaAs layer thickness in the 0.5–1.0‐μm region from the GaAs/Si interface. The appearance of APDs depends on the preheating conditions of the substrate. Preheating at 950 °C for 30 min or at 1000 °C for 5 min was sufficient for the suppression of APDs. This may be due to the change of the Si surface structure and the following complete annihilation of APDs in the GaAs layer near the heterointerface.