Iulian Nistor
Brown, Boveri & Cie
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Publication
Featured researches published by Iulian Nistor.
IEEE Transactions on Electron Devices | 2011
Marina Antoniou; Florin Udrea; Friedhelm Bauer; Iulian Nistor
The aim of this paper is to demonstrate the application of the superjunction (SJ) design in an insulated gate bipolar transistor (IGBT). Bipolar conduction is present and enhanced at the cathode side of the device, while the p-pillars collect the plasma deep from the anode side, thus significantly enhancing its turn-off speed. The disconnected soft punchthrough + (SPT+) SJ IGBT is similar to the SJ IGBT, which we have previously reported, but the drift region pillars do not extend up to the cathode contact. Instead, the upper part of this device is similar to the SPT+ IGBT, i.e., it features an n+ injector around the p-well and the n-drift region that is lightly doped. The improvement in the overall performance is impressive (25% lower ON-state losses and 30% lower switching losses) and can indeed justify the technology cost associated with the SJ technology. We also demonstrate how this technology can be used to form a snapback-free reverse conducting IGBT.
international semiconductor conference | 2009
Iulian Nistor; Tobias Wikstrom; M. Scheinert
This paper focuses on the most recent technical developments in Integrated Gate Commutated Thyristors. Improved Safe Operating Area (SOA) of a new IGCT chip set based on ABBs High Power Technology (HPT) platform with a rated voltage of 10kV is presented. A matching 10kV freewheeling diode is also reported. Combined, these developments open the door to new applications of silicon IGCTs reaching voltage levels of 7.2kV RMS or more.
Microelectronics Reliability | 2014
Vinoth Sundaramoorthy; Enea Bianda; Richard Bloch; Daniele Angelosante; Iulian Nistor; Gernot Riedel; Franz Zurfluh; Gerold Knapp; Alexander Heinemann
Abstract A novel method is presented for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-emitter voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation – without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules. A model has been proposed to extract Tj from Vge measurements. Finally, an IGBT module with semiconductor chips at two different temperatures has been measured using Vge method and this method was found to provide the average junction temperature of all the semiconductor chips.
IEEE Electron Device Letters | 2012
Friedhelm Bauer; Iulian Nistor; Andrei Mihaila; Marina Antoniou; Florin Udrea
In this letter, we report Eoff-versus- Vce tradeoff curves for vertical superjunction insulated-gate bipolar transistors (SJ IGBTs), exhibiting unusual inverse slopes dEoff/dVce >;0 in a transition region between purely unipolar and strongly bipolar device behaviors. This effect is due to the action of p-pillar hole current when depleting the drift layer of SJ IGBTs during turnoff and the impact of current gain on the transconductance. Such SJ IGBTs surpass by a very significant margin their superjunction MOSFET counterparts in terms of power-handling capability and on-state and turnoff losses, all at the same time.
IEEE Electron Device Letters | 2010
Marina Antoniou; Florin Udrea; Friedhelm Bauer; Iulian Nistor
In this letter, we propose a new device, the Semi-Superjunction (SJ) (Semi-SJ) insulated-gate bipolar transistor (IGBT) (Semi-SJ IGBT). The device offers significant improvement in the on state and switching tradeoff compared with the state-of-the-art FieldStop Trench IGBT (FS IGBT). Furthermore, when compared with a full SJ IGBT, the device has a considerably simpler process of manufacturing as the existing fabrication process for the “CoolMOS” could be used. The Semi-SJ IGBT offers better robustness against cosmic rays compared with an FS IGBT; the failure-in-time per surface area (FIT/A) of the device levels are up to two orders of magnitude lower. Alternatively, by changing the structure parameters, one can improve dramatically the on state versus switching tradeoff while maintaining the same FIT/A levels.
IEEE Transactions on Electron Devices | 2013
Neophytos Lophitis; Marina Antoniou; Florin Udrea; Friedhelm Bauer; Iulian Nistor; Martin Arnold; Tobias Wikstrom; Jan Vobecky
This paper focuses on the causes that lead to the final destruction in standard gate-commutated thyristor (GCT) devices. A new 3-D model approach has been used for simulating the GCT which provides a deep insight into the operation of the GCT in extreme conditions. This allows drawing some conclusions on the complex mechanisms that drive these devices to destruction, previously impossible to explain using 2-D models.
IEEE Electron Device Letters | 2011
Marina Antoniou; Florin Udrea; Friedhelm Bauer; Andrei Mihaila; Iulian Nistor
The termination design of superjunction (SJ) structures has always been a conceptual and technological challenge. In this letter, we propose new, optimized, elegant, and cost-efficient solutions toward the realization of the first 1.2-kV rated SJ insulated-gate bipolar transistor. The design is based on the utilization of existing layers in the device fabrication line, hence resulting in no extra complexity or cost increase. The proposed design effectiveness is confirmed through extensive numerical simulations.
international symposium on power semiconductor devices and ic's | 2008
Iulian Nistor; Maxi Scheinert; Tobias Wikstrom; Matthias Luscher
In this paper we present a novel Integrated Gate- Commutated Thyristor (IGCT) for application in medium voltage drives at voltage levels of 7.2kV RMS or more. Measurements of over 11kV blocking-, on-state- and expanded SOA switching behavior are the basis for a detailed description of the performance. The new design features a planar junction termination, in combination with a corrugated p-base. These design concepts provide acceptable turn-on properties and improve turn-off Safe Operating Area (SOA) simultaneously. Improved diode soft reverse recovery at low currents is demonstrated using a combination of deep buffers and the Field Charge Extraction (FCE) concept.
international symposium on power semiconductor devices and ic's | 2012
Marina Antoniou; Florin Udrea; Friedhelm Bauer; A. Mihaila; Iulian Nistor
In this paper we propose novel designs that enhance the plasma concentration across the Field Stop IGBT. The “p-ring” and the “point-injection” type devices exhibit increased cathode side conductivity modulation which results in impressive IGBT performance improvement. These designs are shown to be extremely effective in lowering the on-state losses without compromising the switching performance or the breakdown rating. For the same switching losses we can achieve more than 20% reduction of the on state energy losses compared to the conventional FS IGBT.
IEEE Electron Device Letters | 2015
Marina Antoniou; Neophytis Lophitis; Friedhelm Bauer; Iulian Nistor; M. Bellini; Munaf Rahimo; G.A.J. Amaratunga; Florin Udrea
In this letter, a trench-insulated gate bipolar transistor (IGBT) design with local charge compensating layers featured at the cathode of the device is presented and analyzed. The superjunction or reduced surface effect proves to be very effective in overcoming the inherited ON-state versus breakdown tradeoff appearing in conventional devices, such as the soft punch through plus or field stop plus (FS+) IGBTs. This design enhances the ON-state performance of the FS+IGBT by increasing the plasma concentration at the cathode side without affecting either the switching performance or the breakdown rating.