J. A. Caraveo-Frescas

Record Mobility in Transparent p-Type Tin Monoxide Films and Devices by Phase Engineering

Here, we report the fabrication of nanoscale (15 nm) fully transparent p-type SnO thin film transistors (TFT) at temperatures as low as 180 °C with record device performance. Specifically, by carefully controlling the process conditions, we have developed SnO thin films with a Hall mobility of 18.71 cm(2) V(-1) s(-1) and fabricated TFT devices with a linear field-effect mobility of 6.75 cm(2) V(-1) s(-1) and 5.87 cm(2) V(-1) s(-1) on transparent rigid and translucent flexible substrates, respectively. These values of mobility are the highest reported to date for any p-type oxide processed at this low temperature. We further demonstrate that this high mobility is realized by careful phase engineering. Specifically, we show that phase-pure SnO is not necessarily the highest mobility phase; instead, well-controlled amounts of residual metallic tin are shown to substantially increase the hole mobility. A detailed phase stability map for physical vapor deposition of nanoscale SnO is constructed for the first time for this p-type oxide.

Recent Developments in p-Type Oxide Semiconductor Materials and Devices

The development of transparent p-type oxide semiconductors with good performance may be a true enabler for a variety of applications where transparency, power efficiency, and greater circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, here, recent developments in materials and devices based on p-type oxide semiconductors are reviewed, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides, and nickel oxides. The crystal and electronic structures of these materials are discussed, along with approaches to enhance valence-band dispersion to reduce effective mass and increase mobility. Strategies to reduce interfacial defects, off-state current, and material instability are suggested. Furthermore, it is shown that promising progress has been made in the performance of various types of devices based on p-type oxides. Several innovative approaches exist to fabricate transparent complementary metal oxide semiconductor (CMOS) devices, including novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains. However, despite recent developments, p-type oxides still lag in performance behind their n-type counterparts, which have entered volume production in the display market. Recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented.

Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350°C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200°C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm2V−1s−1, large memory window (∼16 V), low read voltages (∼−1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

Enhancement of p-type mobility in tin monoxide by native defects

Transparent p-type materials with good mobility are needed to build completely transparent p-n junctions. Tin monoxide (SnO) is a promising candidate. A recent study indicates great enhancement of the hole mobility of SnO grown in Sn-rich environment [E. Fortunato et al., Appl. Phys. Lett. 97, 052105 (2010)]. Because such an environment makes the formation of defects very likely, we study defect effects on the electronic structure to explain the increased mobility. We find that Sn interstitials and O vacancies modify the valence band, inducing higher contributions of the delocalized Sn 5p orbitals as compared to the localized O 2p orbitals, thus increasing the mobility. This mechanism of valence band modification paves the way to a systematic improvement of transparent p-type semiconductors.

Transparent p-type SnO nanowires with unprecedented hole mobility among oxide semiconductors

p-type tin monoxide (SnO) nanowire field-effect transistors with stable enhancement mode behavior and record performance are demonstrated at 160 °C. The nanowire transistors exhibit the highest field-effect hole mobility (10.83 cm2 V−1 s−1) of any p-type oxide semiconductor processed at similar temperature. Compared to thin film transistors, the SnO nanowire transistors exhibit five times higher mobility and one order of magnitude lower subthreshold swing. The SnO nanowire transistors show three times lower threshold voltages (−1 V) than the best reported SnO thin film transistors and fifteen times smaller than p-type Cu2O nanowire transistors. Gate dielectric and process temperature are critical to achieving such performance.

P-Type Cu2O/SnO Bilayer Thin Film Transistors Processed at Low Temperatures

P-type Cu2O/SnO bilayer thin film transistors (TFTs) with tunable performance were fabricated using room temperature sputtered copper and tin oxides. Using Cu2O film as capping layer on top of a SnO film to control its stoichiometry, we have optimized the performance of the resulting bilayer transistor. A transistor with 10 nm/15 nm Cu2O to SnO thickness ratio (25 nm total thickness) showed the best performance using a maximum process temperature of 170 °C. The bilayer transistor exhibited p-type behavior with field-effect mobility, on-to-off current ratio, and threshold voltage of 0.66 cm(2) V(-1) s(-1), 1.5×10(2), and -5.2 V, respectively. The advantages of the bilayer structure relative to single layer transistor are discussed.

Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

Electroforming-free resistive switching memory effect in transparent p-type tin monoxide

We report reproducible low bias bipolar resistive switching behavior in p-type SnO thin film devices without extra electroforming steps. The experimental results show a stable resistance ratio of more than 100 times, switching cycling performance up to 180 cycles, and data retention of more than 103 s. The conduction mechanism varied depending on the applied voltage range and resistance state of the device. The memristive switching is shown to originate from a redox phenomenon at the Al/SnO interface, and subsequent formation/rupture of conducting filaments in the bulk of the SnO layer, likely involving oxygen vacancies and Sn interstitials.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.