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Dive into the research topics where J. Caldinhas Vaz is active.

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Featured researches published by J. Caldinhas Vaz.


european microwave conference | 2003

Low cost LTCC filters for a 30GHz satellite system

M. Joao Rosario; Fabrice Le-Strat; Pierre-Frank Alleaume; J. Caldinhas Vaz; Joerg Schroth; Thomas Muller; J. Costa Freire

This paper deals with the improvement on low cost LTCC technology to achieve the specifications of planar filters for a 30GHz Satellite system transmitter. Test structures were fabricated on low cost LTCC technology, presently available for lower frequencies, to characterise its performances up to 40GHz. From this study, guidelines for the design of 30GHz circuits were obtained. Based on these results and their constraints, several solutions for a 30GHz transmitter filter were designed. A comparison between the LTCC filters with active and passive alternative solutions implemented on GaAs monolithic technology is also presented. The feasibility of millimeterwave filters on LTCC with a reasonable yield for mass production is demonstrated.


midwest symposium on circuits and systems | 2007

Automated design of radio-frequency single-ended switched capacitor arrays using genetic algorithms

Luís Mendes; Eduardo José Solteiro Pires; J. Caldinhas Vaz; Maria João Rosário

This paper presents an automated synthesis procedure to design radio-frequency and microwave binary-weighted single-ended switched capacitor arrays (RFSSCAs) from user top-level specifications to components sizes. The method relies on closed-form symbolic mathematical expressions of the input impedance and quality factor of the RFSSCA. The genetic synthesis tool optimizes a fitness function based on user-specified performance constraints. The method determines several optimal solutions, which are completely independent of the starting point. Moreover, infeasible specifications are unambiguously detected. To validate the proposed design algorithm, two RFSSCAs are synthesized in a 0.35 mum CMOS technology and verified by the SpectreRF simulator of the Cadence design environment. The results show that the synthesis and simulation outcomes are in very good agreement.


asia pacific microwave conference | 2000

CMOS active inductors for L band

G. Mascarenhas; J. Caldinhas Vaz; J. Costa Freire

The implementation of CMOS active inductors at 2 GHz is described. The circuit is based on the gyrators theory. Theoretical expressions are derived with an enough accurate MOSFET model. With 0.6 /spl mu/m CMOS standard technology is possible to obtain up to a few tenth of nanohenry inductance with a Q close to 10 at 2 GHz. A MMIC was designed and the first results confirm the theoretical predictions.


european microwave conference | 1993

Optimal design of MESFET frequency multipliers

J. Soares Augusto; M. Joao Rosario; J. Caldinhas Vaz; J. Costa Freire

In this paper, a design criterium for optimizing frequency doubler terminations for maximum output power (Pout) and conversion gain (Gc) is proposed. The design technique, based at a first step on linear S parameters, leads to the calculation of the MESFET terminations. Although rather simple, this approximation led to promising results: with this method, the highest output power-conversion gain trade-off ever reported was achieved and, also, the experimental and simulation results agreed closely.


asia-pacific microwave conference | 2006

Voltage controlled phase shifters on CMOS technology

Guilherme Mascarenhas; J. Caldinhas Vaz; J. Costa Freire

Implementation of voltage controlled active inductors on standard CMOS technology for 2 GHz is described. The circuit is based on a gyrator implemented with a 5 MOSFETs feedback circuit, including the DC bias. Theoretical expressions were derived with a simple but enough accurate MOSFET model. The inductor value is controlled by an auxiliary bias voltage Vtune. An MMIC with a CMOS standard technology was designed, fabricated and tested. At 2 GHz, an L=35 nH inductor with a Qap 7 and a series resonant frequency of 2.6GHz was measured. For DeltaVtune=1.2 V, the inductor value changes from 23 nH up to 70 nH. A phase shifter application was studied: 45deg of phase shift per second order section was achieved.


asia pacific microwave conference | 2000

MMIC lumped and transversal filters with Si technology

M.J. Do Rosario; J. Caldinhas Vaz; J. Costa Freire

This paper describes the design and main characteristics of MMIC band pass active filters for L band. The circuits are based on the lumped and transversal concept and are implemented with standard 0.8 /spl mu/m BiCMOS process. The filters present transmission zeros close to the centre frequency to achieve a high selectivity and small bandwidth. A 3 dB bandwidth of 6% centred at 1.7 GHz and a side band rejection of 24 dB at /spl plusmn/300 MHz were the best results obtained. The circuits are biased from a 3 V power supply to be included on mobile terminals. Comparison with similar filters on GaAs is presented. Their advantages and drawbacks are discussed.This paper describes the design and main characteristics of MMIC band pass active filters for L band. The circuits are based on the lumped and transversal concept and are implemented with standard 0.8 /spl mu/m BiCMOS process. The filters present transmission zeros close to the centre frequency to achieve a high selectivity and small bandwidth. A 3 dB bandwidth of 6% centred at 1.7 GHz and a side band rejection of 24 dB at /spl plusmn/300 MHz were the best results obtained. The circuits are biased from a 3 V power supply to be included on mobile terminals. Comparison with similar filters on GaAs is presented. Their advantages and drawbacks are discussed.


conference on design of circuits and integrated systems | 2015

A 1.1 µA voltage reference circuit with high PSRR and temperature compensation

M. Silva Pereira; João Costa; Marcelino B. Santos; J. Caldinhas Vaz

This paper presents a low-power and a low output voltage CMOS Bandgap Reference Generator topology with high PSRR and a novel temperature curvature compensation method. The proposed design was implemented in a standard 0.13 μm CMOS process. The main circuit is based in an opamp based β-multiplier bandgap circuit with resistive division. The compensation method cancels out up to 2nd order non-linear terms of the BJT voltage by using the MOSFET leakage current effect. The performance of the circuit was verified by post-layout simulations. Simulated results have shown temperature coefficients as low as -4.4 ppm/°C over a temperature range of 140°C (-40°C to 100°C). In addition the circuit demonstrated a PSSR of -100 dB at low frequencies and -73 dB at 1 MHz. The current consumption is 1.1 μA at 27°C.


electrotechnical conference integrating research industry and education in energy and communication engineering | 1989

Design and performance of dielectric resonator oscillators with series feedback

J. Caldinhas Vaz; J.L. Caceres; J. Costa Freire; J. Perez

It is noted that series feedback oscillators stabilized with dielectric resonators (DRs) usually have the two resistive elements of the feedback network (DR and load) in different branches. A design technique for these oscillators is presented which leads to the maximum added power condition and optimization of frequency stability and noise immunity. The nonlinear characterization of the active device is obtained assuming an empirical relation to the power-gain saturation characteristics. The oscillator stability is verified by means of graphical methods based on the network determinant or and on the negative resistance oscillator theory of Kurokawa (1969). The six possible topologies are analyzed for a typical X-band GaAs MESFET using the proposed method. A comparison is made, taking into account the circuit implementation in microstrip, stability, AM and FM noise, spurious oscillations, transient response, and loaded Q-factor.<<ETX>>


IEEE Microwave and Wireless Components Letters | 2016

A 170

M. Silva Pereira; J. Caldinhas Vaz; C. Azeredo Leme; J. T. de Sousa; J. Costa Freire

This letter presents an all-digital low-IF Gaussian Frequency-Shift Keying (GFSK) demodulator. The demodulator is based on a quadrature FM discriminator followed by a bit decision unit. An intermediate-frequency (IF) input signal of 1MHz is used, the same value of the data rate, hence allowing a low-power receiver implementation. By monitoring the SNR of the input packet during the preamble, poor SNR packets are discarded to avoid energy waste with non-decodable packets. The circuit occupies a silicon area of 0.048


international symposium on circuits and systems | 2015

\mu\text{A}

M. Silva Pereira; J. Caldinhas Vaz; C. Azeredo Leme; José T. de Sousa; J. Costa Freire

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Collaboration


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J. Costa Freire

Instituto Superior Técnico

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M. Silva Pereira

Instituto Superior Técnico

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C. Azeredo Leme

Instituto Superior Técnico

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M. Joao Rosario

Instituto Superior Técnico

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Eduardo José Solteiro Pires

University of Trás-os-Montes and Alto Douro

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J. Soares Augusto

Instituto Superior Técnico

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J. T. de Sousa

Instituto Superior Técnico

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José T. de Sousa

Instituto Superior Técnico

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João Costa

Instituto Superior Técnico

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