J.E. Rooda

Characterization of operational time variability using effective process times

Operational time variability is one of the key parameters determining the average cycle time of lots. Many different sources of variability can be identified such as machine breakdowns, setup, and operator availability. However, an appropriate measure to quantify variability is missing. Measures such as overall equipment effectiveness (OEE) used in the semiconductor industry are entirely based on mean value analysis and do not include variances. The main contribution of this paper is the development of a new algorithm that enables estimation of the mean effective process time t/sub e/ and the coefficient of variation c/sub e//sup 2/ of a multiple machine workstation from real fab data. The algorithm formalizes the effective process time definitions as known in the literature. The algorithm quantifies the claims of machine capacity by lots, which include time losses due to down time, setup time, and other irregularities. The estimated t/sub e/ and c/sub e//sup 2/ values can be interpreted in accordance with the well-known G/G/m queueing relations. Some test examples as well as an elaborate case from the semiconductor industry show the potential of the new effective process time algorithm for cycle time reduction programs.

Aggregative Synthesis of Distributed Supervisors Based on Automaton Abstraction

Achieving nonblockingness in supervisory control imposes a major challenge when the number of states of a target system is large, often owing to synchronous product of many relatively small local components. To overcome this difficulty, in this paper we first present a distributed supervisory control problem, then provide an aggregative synthesis approach that computes nonblocking distributed supervisors. The key to the success of this approach is a newly developed automaton abstraction technique, that removes irrelevant internal transitions at each synthesis stage so that nonblocking supervisor synthesis can be carried out on relatively small abstracted models.

Equipment effectiveness: OEE revisited

Overall equipment effectiveness (OEE) is a metric that has been accepted completely in the semiconductor industry. OEE is simple and clear, and standards and guidelines have been developed. Nonetheless, literature indicates imperfections in applying OEE with regard to time base and rate efficiency. As literature lacks a basic framework for OEE, effectiveness has been approached systematically that resulted in a new equipment effectiveness E. The main difference between OEE and E concerns the choice of the time base. OEE does include equipment-independent conditions, such as lack of input items. This condition is not caused by the equipment but by the environment of the equipment. E has been defined to get a performance measure that is related to equipment-dependent states only, viz. effective state consisting of productive state, scheduled down state, and unscheduled down state. Because of the stand-alone condition, the equipment effectiveness expresses the (equipment) internal losses, while utilization expresses the external losses. By using E, equipment can be compared and improved. It can be concluded that the advantage of E over OEE is that real equipment effectiveness is measured as the influence of utilization (equipment-independent conditions) is eliminated.

LANGUAGES AND APPLICATIONS IN HYBRID MODELLING AND SIMULATION: POSITIONING OF CHI

A widely used classification of modelling languages distinguishes the categories continuous time (CT), discrete event (DE), discrete time (DT), and hybrid. For a better insight into the many different hybrid languages, a classification of five categories (CT, CT+, DE, DE+, and CT/DE) is proposed. Each category is explained, together with many of the included languages, simulators, and the associated application fields. Special interest is given to the Chi language used for specification, simulation and real-time control of industrial systems. Its CT part is based on (conditional) DAEs, its DE part on Communicating Sequential Processes. The suitability of the language for DE, CT, and CT/DE modelling is illustrated by two cases.

OEE and equipment effectiveness : an evaluation

The overall equipment effectiveness or efficiency (OEE) is a metric that has been accepted in the semiconductor industry. OEE is simple and clear, and standards and guidelines have been developed. Nonetheless, the literature indicates imperfections in applying OEE with regard to the time base and rate efficiency. As OEE lacks a proper framework, the equipment effectiveness (E) has been developed based on a systematic approach to the equipment. E considers the effectiveness of the equipment with respect to availability, speed and quality losses. Unlike OEE, E is a performance measure for stand-alone equipment, isolated from the environment. In addition, E uses the available effective time as a basis in contrast to OEE, which uses the total time as a basis for measurement. Finally, due to the fact that E is measured directly by the production and effective time, it does not depend on the utilization of the equipment, unlike OEE. Furthermore, it has been shown that OEE does not indicate the influence of downtime and rework, whereas E gives these influences correctly.

Neural networks for job-shop scheduling

A neural network structure has been developed which is capable of solving deterministic job-shop scheduling problems, part of the large class of np-complete problems. The problem was translated in an integer linear programming format which facilatated translation in an adequate neural network structure. Use of the presented structure eliminated the need for integer adjustments. Elementary precalculation is performed with the objective to reduce the search space allowing more rapid calculation of feasible solutions. In this precalculation the earliest possible starting times of the operations are calculated and set as tresholds in the network. The neural network structure was reliable in simulated operation and its performance was superior to structures which have been presented previously. The network structure always produces feasible solutions, in less time, without the application of integer adjustments.

Analyzing a Chi model of a turntable system using Spin, CADP, and Uppaal

Nowadays, due to increasing system complexity and growing competition and costs, industry makes high demands on powerful techniques used to design and analyze manufacturing systems. One of the most popular techniques to do performance analysis is simulation. However, simulation-based analysis cannot guarantee the correctness of a system, so it is less suitable for functional analysis. Our research focuses on examining other methods to do performance analysis and functional analysis, and trying to combine the two. One of the approaches is to translate a simulation model that is used for performance analysis to a model written in an input language of an existing verification tool. We translate a χ [D.A. van Beek, K.L. Man, M.A. Reniers, J.E. Rooda, R.R.H. Schiffelers, Syntax and Consistent Equation Semantics of Hybrid Chi, CS-Report 04-37, Eindhoven University of Technology, 2004] simulation model of a turntable system into models written in the input languages of the tools CADP [J.-C. Fernandez, H. Garavel, A. Kerbrat, L. Mounier, R. Mateescu, M. Sighireanu, CADP—a protocol validation and verification toolbox, in: Proceedings of the 8th Conference on Computer Aided Verification (CAV’96), Lecture Notes in Computer Science, vol. 1102, 1996, pp. 437–440], Spin [G.J. Holzmann, The SPIN Model Checker, Addison-Wesley, 2003] and Uppaal [K.G. Larsen, P. Pettersson, W.Yi, Uppaal in a nutshell, Int. J. Software Tools for Technology Transfer 1 (1–2) (1997) 134–152] and do a functional analysis with each of them. This allows us to evaluate the usefulness of these tools for the functional analysis of χ models. We compare the input formalisms, the expressiveness of the temporal logics, and the algorithmic techniques for model checking that are used in those tools.

A Nonhierarchical Formulation of Analytical Target Cascading

Analytical target cascading (ATC) is a method developed originally for translating system-level design targets to design specifications for the components that comprise the system. ATC has been shown to be useful for coordinating decomposition-based optimal system design. The traditional ATC formulation uses hierarchical problem decompositions, in which coordination is performed by communicating target and response values between parents and children. The hierarchical formulation may not be suitable for general multidisciplinary design optimization (MDO) problems. This paper presents a new ATC formulation that allows nonhierarchical target-response coupling between subproblems and introduces system-wide functions that depend on variables of two or more subproblems. Options to parallelize the subproblem optimizations are also provided, including a new bilevel coordination strategy that uses a master problem formulation. The new.formulation increases the applicability of the ATC to both decomposition-based optimal system design and MDO. Moreover, it belongs to the class of augmented Lagrangian coordination methods, having thus convergence properties under standard convexity and continuity assumptions. A supersonic business jet design problem is used to demonstrate the flexibility and effectiveness of the presented formulation.

Model Abstraction of Nondeterministic Finite-State Automata in Supervisor Synthesis

Blockingness is one of the major obstacles that need to be overcome in the Ramadge-Wonham supervisory synthesis paradigm, especially for large systems. In this paper, we propose an abstraction technique to overcome this difficulty. We first provide details of this abstraction technique, then describe how it can be applied to a supervisor synthesis problem, where plant models are nondeterministic but specifications and supervisors are deterministic. We show that a nonblocking supervisor for an abstraction of a plant under a specification is guaranteed to be a nonblocking supervisor of the original plant under the same specification. The reverse statement is also true, if we impose an additional constraint in the choice of the alphabet of abstraction, i.e., every event, which is either observable or labels a transition to a marker state, is contained in the alphabet of abstraction.

The Synthesis of Time Optimal Supervisors by Using Heaps-of-Pieces

In many practical applications, we need to compute a nonblocking supervisor that not only complies with pre-specified safety requirements but also achieves a certain time optimal performance such as maximum throughput. In this paper, we first present a minimum-makespan supervisor synthesis problem. Then we show that the problem can be solved by a terminable algorithm, where the execution time of each string is computable by the theory of heaps-of-pieces. We also provide a timed supervisory control map that can implement the synthesized minimum-makespan sublanguage.