J. Hajto

Analogue memory and ballistic electron effects in metal-amorphous silicon structures

Abstract We present experimental results showing that p+ amorphous silicon memory structures exhibit polarity-dependent analogue memory switching. The effect is non-volatile and we propose that it is associated with changes in a tunnelling barrier within the structure. It is also observed that conduction in the memory ON state is restricted to a narrow conducting channel through which the electrons can, under certain conditions, travel ballistically. As a conseauence, auantized resistance levels associated with ballistic electron transport are observed under certain circumstances. In the presence of a magnetic field, additional steps in the auantized resistance levels occur. A particular feature of this auantized resistance is that the effect can be observed at relatively high temperatures (up to about 190 K).

The switching mechanism in amorphous silicon junctions

Abstract Extensive new results have been obtained on memory switching in a-Si p + ni junctions. It is shown that the ON-state has its origins in a highly conducting filament less than lμm in diameter. The physical mechanisms that could play a role in the switching operations are discussed.

Quantization effects in metal/a-Si:H/metal devices

Abstract We present experimental results showing that metal/p+/metal amorphous silicon (a-Si: H) memory structures exhibit room temperature quantized electron transport associated with quantized resistance. The quantization of resistance is observed at values of R = h/2ie2, where i is an integer or a half integer.

Memory switching in amorphous silicon devices

Abstract Recent experimental observations on high-speed memory switching in p+-n-i structures of amorphous silicon are described. Particular emphasis is given to the first switching operation of a virgin device which is effectively a unique forming process for all subsequent operations. There is a characteristic delay for forming, varying over ten orders of magnitude from ∼ 102to ∼ 10−8 s. Evidence is presented to show that forming is a charge controlled process which occurs at a constant field across the n-layer, but details of the switching mechanisms in the a-Si p+-n-i devices remain obscure.

AC characteristics of Cr/p/sup +/a-Si:H/V analog switching devices

Experimental results on the ac characteristics of electro-formed Cr/p/sup +/ hydrogenated amorphous silicon (a-Si:H)/V thin film memory devices are presented. The impedance spectrum of the memory switching device has been measured over a wide frequency range from 1 Hz-32 MHz while keeping the ac voltage amplitude below 0.02 V. Simulation of the measured impedance spectrum using an equivalent circuit indicates that the capacitance associated with a conducting filament tends to increase as the memory resistance decreases. This is explained on the basis of an activated tunnelling mechanism. Charge transport is dominated by electron tunnelling via metallic particles in the filament, and hence small changes in interparticle spacing influences the tunnelling process considerately, leading to changes in both memory resistance and effective dielectric constant.

Aspects of Non-Volatility in a-Si:H Memory Devices

ABSTRACT.: a-Si:H p + -n-i devices, after a once only forming process, switch between two distinct states, both of which are memory states, and are electrically programmable with pulses in the nanosecond range with at least a 1 million cycle endurance. They are known to be non-volatile memory states which persist for long periods. This paper examines the nature of this non-volatility by looking at the effects of time, temperature, bias and radiation. It is found that these digital memory states persist with no change in state for at least four years under zero bias, and that they can withstand high temperatures both under bias and at zero bias. This and a resistance to radiation and a space environment shows that a mechanism of charge storage is unlikely and that they may have applications in hostile environments. The reason for such stability is unclear, but may be associated with the incorporation and distribution of metal in the filamentary region.

Analogue memory effects in metal/a-Si:H/Metal memory devices

In this paper we present experimental data for Metal/a-Si:H/Metal structures which demonstrate that they can be programmed into a range of non-volatile resistance states between 1 kΩ and 1 MΩ with nanosecond pulses of less than 5 V magnitude. A number of results are presented which show the importance of the top metal in the device operation.

Analogue Memory Effects in Metal/ a-Si:H /Metal Thin Film Structures

The ac conductivities of non-volatile analogue memory states are measured in electro-formed Cr/p + /V amorphous silicon structures for a broad frequency range (from 0.1 Hz to 32 MHz). The results suggest that the memory action is associated with electronic processes.

Use of a-Si:H memory devices for non-volatile weight storage in artificial neural networks

Abstract An Artificial Neural Network (ANN) is an ensemble of simple processing units interconnected by variable strength weights. VLSI ANNs use either dynamic techniques or non-volatile EEPROM technology for weight storage. a-Si:H memory devices offer an alternative method for the non-volatile storage of analogue weight values. Results are presented from a test chip on which a-Si:H analogue memory devices were fabricated on the surface of a conventional CMOS chip. The design of a second chip is discussed, in which a-Si:H devices are used to store the synaptic weights.

Quantised electron effects in metal/a-Si:H/metal thin film structures

We present experimental results showing that metal/p + /metal amorphous silicon (a-Si:H) memory structures exhibit room temperature quantised electron transport associated with quantised resistance. The quantisation of resistance is observed at values of R= h/2ie 2 , where i is an integer or a half integer.