J. John

Photovoltaic IV-VI on Si infrared sensor arrays for thermal imaging

Photovoltaic narrow-gap IV-VI (lead chalcogenide) infrared sensor arrays on Si substrates have the potential for low-cost infrared focal-plane arrays. The arrays can be bump bonded to readout multiplexers, or be grown on prefabricated active Si substrates containing the whole readout circuits. Sensitivities are similar to that of Hg 1-x Cd x Te, but processing procedures are much less demanding. This is because the structural quality of even heavily lattice-mismatched IV-VI layers is adequate to fabricate devices with good sensitivities, because 2- to 4-μm layer thickness suffices, and because good homogeneity in ternary Pb 1-x Sn x Se for the 8- to 12-μm range is much easier to obtain than in Hg 1-x Cd x Te. New results are presented on the molecular beam epitaxial growth of the layers, including a very thin CaF 2 buffer needed for compatibility reasons, and a new photolithographic patterning technique suited for full wafer processing has been developed to fabricate the sensor arrays. First thermal images using these chips are demonstrated.

Structure of epitaxial PbSe grown on Si(111) and Si(100) without a fluoride buffer layer

Epitaxial growth of PbSe on (111)‐ and (100)‐oriented Si substrates without an intermediate buffer layer is studied. It is found that on Si(111) the orientation of the IV‐VI layer can by varied from (100) at 200 °C to (111) at 400 °C substrate temperature. On Si(100), only (100)‐oriented layers were obtained for the whole temperature range. (100)‐oriented layers with thicknesses above 0.5 μm were cracked due to thermally induced mechanical strain on cooldown to room temperature. This strain cannot be relaxed by dislocation glide in the first glide systems as it is the case for (111)‐oriented layers. The structural quality of (100)‐oriented PbSe layers on Si(100) and Si(111) is inferior compared to layers grown with an intermediate BaF2/CaF2 or CaF2 buffer layer. This implies that the covalent/ionic PbSe/Si interface seems to impede high‐quality epitaxy, contrary to the well known ionic/ionic IV‐VI/IIa‐fluoride interface.

Infrared p-n-junction diodes in epitaxial narrow gap PbTe layers on Si substrates

The characteristics of p-n+ junctions in PbTe layers on Si(111) grown by molecular beam epitaxy are described. The temperature dependence of the leakage currents and ideality factors show that the junctions are generation-recombination limited over the 300–100 K range. The lifetimes deduced for the minority carriers (about 0.1 ns) suggest that their diffusion length is limited by the density of the threading dislocations, which was about 108 cm−2 for these heavily lattice mismatched layers. The theoretical diffusion limit at 200 K would be attained by reducing the dislocation density by a factor of 100. Such low densities have already been obtained in lead–chalcogenide layers on Si substrates by temperature cyclings.

Schottky‐barrier fluctuations in Pb1−xSnxSe infrared sensors

Epitaxial Pb1−xSnxSe layers have been grown on Si substrates, and Schottky‐barrier infrared sensors were fabricated in the layers using Pb blocking contacts. The observed current–voltage characteristics (saturation currents j0 and ideality factors n) as a function of temperature are quantitatively explained with a fluctuation model of the barrier heights [J. H. Werner, W. Guttler, J. Appl. Phys. 69, 1991 (1522)]. The amount of the mean barrier fluctuation σ, which is typically 10–30 meV, depends on the layer quality and fabrication procedure. Higher σ causes higher j0 with increasing saturation values at low temperatures. In addition, the fluctuations cause high n(>2) values at low temperatures. Layers with improved structural quality (higher mobilities and lower threading dislocation densities) lead to lower barrier fluctuations and, therefore, to increased sensitivities.

IR-sensor array fabrication in Pb1−xSnxSe-on-Si heterostructures

Abstract Large line or area arrays of photovoltaic infrared sensors are desired for thermal imaging and spectroscopic applications. The sensor arrays should be arranged on Si-substrates because of size, costs and the possibility to integrate the read-out electronics of large arrays directly into the Si-substrate. We therefore grow narrow gap Pb 1− x Sn x Se layers by molecular beam epitaxy (MBE) on Si(111)-substrates. A CaF 2 epitaxial buffer layer is used for compatibility reasons. Photovoltaic infrared sensor arrays for the 8–12 μm atmospheric window are fabricated in the 2–4 μm thick layers by photolithographic techniques with 8 mask levels and 6 simple wet etching steps. The operability of the sensor arrays is demonstrated by recording thermal images with a simple camera.

Thermal imaging camera with linear Pb1−xSnxSe-on-Si infrared sensor array and combined JFET/CMOS read-out electronics

A thermal imaging camera for the 8–12 μm wavelength range is described which employs a new infrared sensor device and read-out principle. A bilinear 2 × 128 element infrared sensor array is fabricated in a narrow gap Pb1−xSnxSe layer grown epitaxially on a Si-substrate. A ≈ 30 A thick intermediate epitaxial CaF2 buffer layer is used for compatibility reasons. The read-out electronics chips contain, for each sensor, an integrator with a low noise JFET input transistor, correlated multiple sampling, and a sample and hold amplifier. They are wire-bonded to the sensor array and operated at 80–120 K. The JFET input transistors allow to amplify from much lower source impedances (down to <10 kΩ) than with CMOS design without adding significant noise. Therefore, infrared sensors with lower impedances can be used, which allows operation at higher temperature, or to use sensors with longer cut-off wavelengths.

Pb1-xSnxSe-on-Si LWIR thermal imaging system

A demonstrational thermal imaging LWIR camera system is described which is based on photovoltaic Pb1-xSnxSe-on-Si infrared sensor arrays. Epitaxial Pb1-xSnxSe layers, about 2 micrometer thick, are grown by molecular beam epitaxy onto 3 inch Si(111) substrates, and employing an intermediate CaF2 buffer layer of only 2 nm thickness for compatibility reasons. Linear arrays with 256 pixels on 50 micrometer centers are fabricated in the layers with a batch photolithographic technique. Cut- off wavelength is about 10 - 10.5 micrometer at operating temperatures of 80 - 120 K, and quantum efficiencies greater than 60%. The sensors operate near BLIP. The read-out electronics chips contain, for each sensor, an integrator with a low noise JFET input transistor, correlated multiple sampling, and a sample and hold amplifier. They are wire- bonded to the sensor array. The JFET input transistors allow it to amplify from much lower source impedances (down to less than 10 kOhm) than with CMOS design without adding significant noise. Infrared sensors with lower impedances, operation at higher temperature, or sensors with longer cut-off wavelengths can therefore be used.

PbSnSe-on-Si: material and IR-device properties

Progress in the development of narrow gap IV-VI-on-Si technology for IR sensor arrays is reviewed. Epitaxial Pb1-xSnxSe layers, about 4 micrometers thick, are grown by molecular beam epitaxy onto 3 inch Si(111) substrates. An intermediate CaF2 buffer layer of only 2 nm thickness was employed for compatibility reasons in most cases, direct growth without buffer layer, however, is possible. Material quality is improved by proper growth conditions and annealing. Threading dislocation densities as low as 106 cm-2 are obtained in samples with 3 X 3 cm2 size after proper anneal. It seems that glissile threading dislocations sweep out across the edge of the samples, and, in addition, such dislocations are able to react with sessile ones and transform them to glissile. IR photodiodes with much higher resistance area products can be obtained which approach the theoretical limit in a certain temperature range with such improve material quality. If the Pb/Pb1-xSnxSe IR Schottky-barrier sensors are described with a model which allows fluctuations of the barrier height, the saturation of the resistance-area products at low temperatures as well as ideality factors > 1 are explained as well.

Pb 1−x Sn x Se-on-Si LWIR sensor arrays and thermal imaging with JFET/CMOS read-out

Long wavelength infrared (LWIR) sensor arrays were fabricated in Pb1−xSnxSe layers grown epitaxially on Si-substrates by MBE. A CaF2 intermediate buffer layer ≈30dgA thick was employed for compatibility reasons. The photovoltaic sensors are based on the blocking Pb-contact technique on p-type material. They were fabricated using simple wet-etching process steps only. Cut-off wave-lengths were about 10.5 µm, quantum efficiencies >60%, and resistance-aera products above 3 Ω-cm2 at 90K. A demonstrational LWIR thermal imaging camera was assembled with a 256 element line array with 50 µm pitch. Low-noise signal processing was achieved with sensors with differential resistances in the 10 kOhm range by using JFET/CMOS technology. For each channel, an integrator, correlated multiple sampling and sample/hold amplifier was used before multiplexing to a common output.

Properties of expitaxial Pb1−xSnxSe on CaF2 covered Si(111) substrates

Abstract Epitaxial narrow gap Pb 1− x Sn x Se layers on Si-substrates are used for infrared focal plane arrays for thermal imaging in the 8–12 μm wavelength range. The density of threading dislocations in the 3–4 μm thick layers due to the lattice mismatch is about 3 × 10 7 cm −2 , in accordance with the width of X-ray rocking curves (100 arc s range). These narrowest widths are obtained only in layers which exhibit high carrier mobilities. Due to the thermal expansion mismatch, misfit dislocations formed during growth glide on each temperature change along the {100} main glide planes. The interaction probabilities of such crossing dislocations leading to strain hardening is extremely low, a rough estimate leads to a value of 10 −5 . This is because the cumulative plastic deformation (applied by repeated temperature cycling) is as high as 500%.