J.K. Rath

Upconverter solar cells: materials and applications

Spectral conversion of sunlight is a promising route to reduce spectral mismatch losses that are responsible for the major part of the efficiency losses in solar cells. Both upconversion and downconversion materials are presently explored. In an upconversion process, photons with an energy lower than the band gap of the solar cell are converted to higher energy photons. These higher photons are directed back to the solar cell and absorbed, thus increasing the efficiency. Different types of upconverter materials are investigated, based on luminescent ions or organic molecules. Proof of principle experiments with lanthanide ion based upconverters have indicated that the benefit of an upconversion layer is limited by the high light intensities needed to reach high upconversion quantum efficiencies. To address this limitation, upconverter materials may be combined with quantum dots or plasmonic particles to enhance the upconversion efficiency and improve the feasibility of applying upconverters in commercial solar cells.

Low temperature polycrystalline silicon: a review on deposition, physical properties and solar cell applications

This review article gives a comprehensive compilation of recent developments in low temperature deposited poly Si films, also known as microcrystalline silicon. Important aspects such as the effect of ions and the frequency of the plasma ignition are discussed in relation to a high deposition rate and the desired crystallinity and structure. The development of various ion energy suppression techniques for plasma enhanced chemical vapour deposition and ion-less depositions such as HWCVD and expanding thermal plasma, and their effect on the material and solar cell efficiencies are described. The recent understanding of several important physical properties, such as the type of electronic defects, structural effects on enhanced optical absorption, electronic transport and impurity incorporation are discussed. For optimum solar cell efficiency, structural considerations and predictions using computer modelling are analysed. A correlation between efficiency and the two most important process parameters, i.e., growth rate and process temperature is carried out. Finally, the application of these poly Si cells in multijunction cell structures and the best efficiencies worldwide by various deposition techniques are discussed.

Understanding light trapping by light scattering textured back electrodes in thin film n‐i‐p-type silicon solar cells

For substrate n‐i‐p-type cells rough reflecting back contacts are used in order to enhance the short-circuit currents. The roughness at the electrode∕silicon interfaces is considered to be the key to efficient light trapping. Root-mean-square (rms) roughness, angular resolved scattering intensity, and haze are normally used to indicate the amount of scattering, but they do not quantitatively correlate with the current enhancement. It is proposed that the lateral dimensions should also be taken into account. Based on fundamental considerations, we have analyzed by atomic force microscopy specific lateral dimensions that are considered to have a high scattering efficiency. Textured back reflectors with widely varying morphologies have been developed by the use of sputtered Ag and Ag:AlOx layers. For these layers we have weighted the rms roughness of the surface with the lateral dimensions of the effective scattering features. A clear correlation is found between the current generation under (infra)red light...

Device-quality polycrystalline and amorphous silicon films by hot-wire chemical vapour deposition

Abstract We describe how high-quality intrinsic hydrogenated amorphous silicon (a-Si: H), as well as purely intrinsic single-phase hydrogenated polycrystalline silicon (poly-Si: H), can be obtained by hot-wire chemical vapour deposition (HWCVD). The deposition parameter space for these different thin-film materials has been optimized in the same hot-wire deposition chamber. A review of the earlier work shows how such high-quality films at both ends of the amorphous-crystalline scale have evolved. We incorporated both the amorphous and the polycrystalline silicon films in n-i-p solar cells and thin-film transistors (TFTs). The solar cells, with efficiencies in excess of 3%, confirm the material quality of both the a-Si: H and the poly-Si: H i-layer materials, but more work is needed to improve the interfaces with the doped layers. The TFTs made with a-Si: H and poly-Si: H channels show quite similar characteristics, such as a field-effect mobility of 0·5cm2 V−1 s−1, indicating that the channel region has a...

Incorporation of p-type microcrystalline silicon films in amorphous silicon based solar cells in a superstrate structure

Thin ( 10−2 Ω−1 cm−1) and low activation energy (<0.08 eV) have been achieved for thin films on various oxide substrates i.e., Corning 7059 glass, SnO2 : F, TiO2 and Ta2O5. Deposition of thin p-μc-Si : H is possible on void rich films (a-SiC : H and low-temperature deposited a-Si : H) but not on device quality a-Si : H. Single junction p-i-n cells were made in a superstrate structure using p-μc-Si : H as the window layer directly on top of SnO2 : F coated glass. For the first time an efficiency of 9.63% could be achieved for a single junction cell with a truly microcrystalline silicon p-layer in a superstrate configuration. There is an improvement in the blue spectral response compared to the cell made with a-SiC : H(B) as window layer. However, open circuit voltage and fill factor were critically dependent on the choice of buffer layer at the p/i interface. Computer simulations point out that this can be attributed to the valence band offset between the amorphous i-layer and the microcrystalline p-layer. The buffer acts as a barrier to electron back-diffusion and reduces the recombination in the p-layer. Tandem cells (a-Si : H/a-Si : H) incorporating p-μc-Si : H along with n-μc-Si : H in the tunnel junction showed an efficiency of 9.9% and FF of 0.73. The tunnel junction n-μc-Si : H/p-μc-Si : H needed an oxide interface layer for a good performance. The role of the interface layer may be to increase the tunnel recombination as well as to act as a diffusion barrier to dopants.

Purely Intrinsic Poly-silicon Films for n-i-p Solar Cells

Polycrystalline silicon films have been prepared by hot wire chemical vapor deposition (HWCVD) at a relatively low substrate temperature of 430° C at a high growth rate (>5 A/s) by optimizing the hydrogen dilution of the silane feedstock gas, the gas pressure and the wire temperature. The optimized material has 95% crystalline volume fraction with complete coalescence of grains. The grains with an average size of 70 nm have a preferential orientation along the (220) direction. Large structures up to 0.5 µ m could be observed by atomic force microscopy (AFM). An activation energy of 0.54 eV for the electrical transport and a low carrier concentration (<1011 cm-3) confirmed the intrinsic nature of the films. A white light photoconductivity of 1.9×10-5 Ω-1 cm-1, a high minority carrier diffusion length of 334 nm and a low (<1017 cm-3) defect density ensure that the poly-Si:H films possess device quality. A very small temperature dependence of the Hall mobility (0.012 eV) indicates negligible barrier to carrier transport at the grain boundaries. A single junction n-i-p cell incorporating HWCVD poly-Si:H in the configuration n+-c-Si/i-poly-Si:H/p-µc-Si:H/ITO yielded 3.15% efficiency under 100 mW/cm2 AM1.5 illumination and a current density of 18.2 mA/cm2 was achieved for only 1.5 µ m thick i-layer.

Performance of heterojunction p+ microcrystalline silicon n crystalline silicon solar cells

We have studied by Raman spectroscopy and electro-optical characterization the properties of thin boron doped microcrystalline silicon layers deposited by plasma enhanced chemical vapor deposition (PECVD) on crystalline silicon wafers and on amorphous silicon buffer layers. Thin 20–30 nm p+ μc-Si:H layers with a considerably large crystalline volume fraction (∼22%) and good window properties were deposited on crystalline silicon under moderate PECVD conditions. The performance of heterojunction solar cells incorporating such window layers were critically dependent on the interface quality and the type of buffer layer used. A large improvement of open circuit voltage is observed in these solar cells when a thin 2–3 nm wide band-gap buffer layer of intrinsic a-Si:H deposited at low temperature (∼100 °C) is inserted between the microcrystalline and crystalline silicon [complete solar cell configuration: Al/(n)c-Si/buffer/p+μc-Si:H/ITO/Ag)]. Detailed modeling studies showed that the wide band-gap a-Si:H buffe...

Excellent crystalline silicon surface passivation by amorphous silicon irrespective of the technique used for chemical vapor deposition

Crystalline silicon surface passivation by amorphous silicon deposited by three different chemical vapor deposition (CVD) techniques at low (T∼130 °C) temperatures is compared. For all three techniques, surface recombination velocities (SRVs) are reduced by two orders of magnitude after prolonged thermal annealing at 200 °C. This reduction correlates with a decreased dangling bond density at the amorphous-crystalline interface, indicating that dangling bond saturation is the predominant mechanism. All three deposition methods yield excellent surface passivation. For a-Si:H layers deposited by radio frequency plasma enhanced CVD, we obtain outstanding carrier lifetimes of 10.3 ms, corresponding to SRVs below 1.32 cm/s.

Growth process and properties of silicon nitride deposited by hot-wire chemical vapor deposition

Hot-wire chemical vapor deposition (HWCVD) is a promising technique for the deposition of silicon nitride layers (a-SiNx:H) at low temperatures. In contrast to the commonly used plasma-enhanced chemical vapor deposition, no ion bombardment is present in HWCVD, which makes it particularly attractive for the deposition of passivation layers on structures that are sensitive to the impact of energetic ions. We deposit hot-wire a-SiNx:H from a mixture of silane and ammonia at substrate temperatures in the range of 300–500 °C. Layers deposited with an ammonia/silane gas-flow ratio of R=30 are close to stoichiometry (N/Si=1.33) with a hydrogen content around 10 at. %. Such films have been implemented in hot-wire a-Si:H thin-film transistors. Deposition with R>30 did not result in an increase of the N content, but led to more porous films. Infrared spectroscopy revealed that moisture penetrates these layers and that oxygen is incorporated in the network under air exposure. Cross-sectional transmission electron mi...

New challenges in thin film transistor (TFT) research

Abstract This paper addresses the current trends in research and development for: (1) Thin film transistors (TFTs) on plastic substrates, (2) low-temperature poly-silicon (LTPS) for the pixel TFTs and for row and column drivers on glass, (3) addressing of organic light emitting diodes by silicon TFTs. For these advanced applications of TFTs the relevant issues are: (i) higher electron mobility, (ii) stability, and (iii) defect free, uniform deposition of thin silicon films and gate dielectrics at a high deposition rate (reduced cost). At Utrecht University, we are investigating hot wire (catalytic) chemical vapor deposition (CVD) as a deposition technique for novel TFTs that have a high potential to meet the above mentioned requirements. Bottom gate, inverted staggered TFTs with hot wire CVD (HWCVD) silicon films have been made with an electron mobility of 1.5 cm 2 / V s , and with field effect characteristics that are completely stable under operating conditions. Top gate, coplanar TFTs with polycrystalline silicon (poly-Si) films have been made, which showed a mobility of 4.7 cm 2 / V s . This has been obtained without any post treatment, and the hot wire technology can thus avoid expensive, time-consuming steps such as laser recrystallization as currently used in the production of the latest poly-Si lap top displays. HWCVD is also suitable for the deposition of SiNx:H gate dielectrics. TFTs with a hot wire silicon nitride gate dielectric have been deposited.