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Dive into the research topics where J. R. Lothian is active.

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Featured researches published by J. R. Lothian.


Solid-state Electronics | 1997

Demonstration of enhancement-mode p- and n-channel GaAs MOSFETS with Ga2O3(Gd2O3) As gate oxide

F. Ren; M. Hong; W. S. Hobson; J.M. Kuo; J. R. Lothian; J. P. Mannaerts; J. Kwo; S.N.G. Chu; Y.K. Chen; Alfred Y. Cho

Abstract We report the demonstration of both enhancement-mode p - and n -channel GaAs metal oxide semiconductor field effect transistors (MOSFETs) on GaAs semi-insulating substrates using high quality Ga 2 O 3 (Gd 2 O 3 ) as the gate dielectric and the conventional ion-implant technology. The source and drain regions were selectively implanted with Zn or Si for low resistance ohmic contacts for p - or n -MOSFETs, respectively. AuBe/Pt/Au, Ge/Mo/Au-Ge/Mo/Au, and Ti/Pt/Au were deposited for p - and n -ohmic contacts and gate electrode, respectively. The devices, with a 4 × 50 μ m 2 gate geometry, exhibit an extrinsic transconductance of 0.18 and 0.1 mS/mm for p - and n -MOSFETs, respectively, and an excellent gate breakdown field greater than 3 MV cm −1 .


IEEE Electron Device Letters | 1998

Ga 2 O 3 (Gd 2 O 3 )/InGaAs enhancement-mode n-channel MOSFETs

F. Ren; J. M. Kuo; M. Hong; W. S. Hobson; J. R. Lothian; J. Lin; Huan-Shang Tsai; J. P. Mannaerts; J. Kwo; S. N. G. Chu; Y.K. Chen; A. Y. Cho

We have demonstrated the first Ga/sub 2/O/sub 3/(Gd/sub 2/O/sub 3/) insulated gate n-channel enhancement-mode In/sub 0.53/Ga/sub 0.47/As MOSFETs on InP semi-insulating substrate. Ga/sub 2/O/sub 3/(Gd/sub 2/O/sub 3/) was electron beam deposited from a high purity single crystal Ga/sub 5/Gd/sub 3/O/sub 12/ source. The source and drain regions of the device were selectively implanted with Si to produce low resistance ohmic contacts. A 0.75-/spl mu/m gate length device exhibits an extrinsic transconductance of 190 mS/mm, which is an order of magnitude improvement over previously reported enhancement-mode InGaAs MISFETs. The current gain cutoff frequency, f/sub t/, and the maximum frequency of oscillation, f/sub max/, of 7 and 10 GHz were obtained, respectively, for a 0.75/spl times/100 /spl mu/m/sup 2/ gate dimension device at a gate voltage of 3 V and drain voltage of 2 V.


Journal of Vacuum Science and Technology | 1993

Dry and wet etching characteristics of InN, AlN, and GaN deposited by electron cyclotron resonance metalorganic molecular beam epitaxy

S. J. Pearton; C. R. Abernathy; F. Ren; J. R. Lothian; P. W. Wisk; A. Katz

The dry etching characteristics of thin film InN, AlN, and GaN epitaxial layers deposited using metalorganic group III sources (trimethylindium, trimethylamine alane, and triethylgallium) and electron cyclotron resonance (ECR) plasma excited atomic nitrogen in a metal organic molecular beam epitaxy (MO‐MBE) chamber have been examined using CCl2F2/Ar, BCl3/Ar, and CH4/H2/Ar discharges. In a hybrid ECR‐rf system, the Cl‐based chemistries readily etch GaN and AlN, while addition of F to the discharges dramatically reduces the etch rate of AlN. Slow, smooth etching of InN is achieved with the CH4/H2/Ar chemistry. Controlled rates of ∼200 A min−1 are obtained for all three materials at moderate dc biases (≤−200 V), low pressure (1 mTorr), and low microwave power (200 W). The dc bias and pressure dependence of the etching have been systematically studied. GaN films can be wet chemically etched in 30–50% NaOH solutions, AlN in HF and InN in HCl:HNO3 solutions.


Applied Physics Letters | 1998

THERMAL STABILITY OF W AND WSIX CONTACTS ON P-GAN

X. A. Cao; S. J. Pearton; F. Ren; J. R. Lothian

The annealing temperature (400–1100 °C) and measurement temperature (25–300 °C) dependencies of current–voltage characteristics of W and WSi0.45 contacts on p-GaN have been compared to the more common Ni/Au metallization. At 25 °C, slightly rectifying characteristics were obtained for all three types of contact, but at 300 °C specific contact resistances in the 10−2 Ω cm2 range were obtained for WSi0.45 and Ni/Au. This is due to an increase in Mg acceptor ionization efficiency (from 10% at 25 °C to 57% at 300 °C) and more efficient thermionic hole emission across the metal-GaN interface. Both WSi0.45 and W contacts retained featureless surface morphology for annealing at >900 °C, whereas Ni/Au showed substantial islanding at ⩽700 °C.


international electron devices meeting | 1996

Enhancement-mode p-channel GaAs MOSFETs on semi-insulating substrates

F. Ren; M. Hong; W. S. Hobson; Jenn-Ming Kuo; J. R. Lothian; J. P. Mannaerts; J. Kwo; Y.K. Chen; A. Y. Cho

We report on the first demonstration of an enhancement-mode p-channel GaAs metal oxide field effect transistor (MOSFET) realized directly on GaAs semi-insulating substrate with a fully ion-implant technology. The device, with a 40/spl times/50 /spl mu/m/sup 2/ gate geometry, shows very good DC characteristics with transconductance of 0.3 mS/mm and an excellent gate breakdown field greater then 3 MV/cm.


Journal of Vacuum Science & Technology B | 1991

Dry etch processing of GaAs/AlGaAs high electron mobility transistor structures

S. J. Pearton; F. Ren; J. R. Lothian; T. R. Fullowan; R. F. Kopf; U. K. Chakrabarti; S. P. Hui; A. B. Emerson; R. L. Kostelak; S. S. Pei

Damage introduction into GaAs/AlGaAs high electron mobility transistor (HEMT) structures during either pattern transfer or gate mesa etching steps has been characterized. For O2 reactive ion etching of the polydimethylglutarimide (PMGI) planarizing layer in a trilevel resist mask, the threshold dc bias for observable damage introduction in the AlGaAs donor layer is ∼200 V. This threshold bias for damage is a function of the PMGI overetch time and for extended times (>10 min), a decrease in saturated drain‐source current (IDSS) of the HEMTs can be detected for oxygen ions accelerated through a bias of ∼150 V. The use of combined electron cyclotron resonance (ECR)/radio frequency (rf) O2 discharges enhances the PMGI etch rate without creating additional damage to the device, and 0.25‐μm gate widths have been demonstrated. Gate mesa formation by etching the GaAs cap with CCl2F2/O2 or CH4/H2/Ar discharges is shown to produce damage in the underlying AlGaAs at dc negative biases of 125–150 V. In addition, subs...


Journal of Vacuum Science & Technology B | 1998

Depletion mode GaAs metal–oxide–semiconductor field effect transistors with Ga2O3(Gd2O3) as the gate oxide

M. Hong; F. Ren; J. M. Kuo; W. S. Hobson; J. Kwo; J. P. Mannaerts; J. R. Lothian; Y.K. Chen

We have successfully fabricated depletion mode GaAs metal–oxide–semiconductor field effect transistors using Ga2O3(Gd2O3) as the gate oxide and an oxygen implant isolation technique. Growth of the device structure including the deposition of Ga2O3(Gd2O3) was performed in a multichamber molecular beam epitaxy system. A 1 μm×100 μm device shows excellent dc and microwave characteristics with low output conductance. Complete pinchoff at Vg=−2.5 V and operation in the accumulation mode of up to Vg=2.5 V were measured. The maximum transconductance was 100 mS/mm, with a high drain current density of 315 mA/mm. Microwave testing yielded a fT of 14 GHz and a fmax of 35 GHz.


Journal of The Electrochemical Society | 1996

Extremely High Etch Rates of In‐Based III‐V Semiconductors in BCl3 / N 2 Based Plasma

F. Ren; W. S. Hobson; J. R. Lothian; J. Lopata; S. J. Pearton; J. A. Caballero; M. W. Cole

Extremely high etch rates of InGaP and InP are observed as N 2 is added to BCl 3 discharges. The etch rates of ∼2.0 μm/min and ∼1.8 μm/min for InGaP and InP, respectively, are achieved at 100°C with 1000 W of electron cyclotron resonance power and -145 V self-bias. Optical emission spectra show increases of intensities for Cl 2 + and Cl + emissions with the presence of N 2 in BCl 3 plasmas as well as an additional BN emission at 385.6 nm. This trend of increasing emission intensity is consistent with the increase of etching rate with BCl 3 /N 2 discharge. A low threshold current, 9.7 mA, InGaAs/GaAs/InGaP ridge lasers with a ridge width and cavity length of 1.4 and 750 μm, respectively, were also demonstrated with this etching processing.


Solid-state Electronics | 1999

Implanted p–n junctions in GaN

X. A. Cao; J. R. LaRoche; F. Ren; S. J. Pearton; J. R. Lothian; Rajiv K. Singh; R. G. Wilson; H. J. Guo; S. J. Pennycook

Abstract 29 Si + ion implantation into GaN(Mg), followed by rapid thermal annealing at 1100°C was used to create n+/p junctions. The junction ideality factor was ∼2, indicative of a high density of generation–recombination centers, and the breakdown voltage was 13 V at 5.1×10−4 A cm−2. Transmission electron microscopy revealed a high density (>1010 cm−2) of implantation damage-related dislocations in the material, due to incomplete annealing of displaced lattice atoms. Higher annealing temperatures and improved junction passivation are needed for improved stand-off voltages.


Solid-state Electronics | 1997

Recessed gate GaN field effect transistor

F. Ren; J. R. Lothian; Y.K. Chen; R. F. Karlicek; L. Tran; M. Schurmann; R. A. Stall; J. W. Lee; S. J. Pearton

Abstract A n + n GaN metal semiconductor field effect transistor was fabricated, with the gate recess formed by Electron Cyclotron Resonance BCl 3 N 2 dry etching. The drain source breakdown voltage is > 20 V, and annealing at 400°C was found to be necessary after the dry etch step to produce a high gate breakdown voltage (∼ 25 V).

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M. Hong

National Taiwan University

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