J. T. Fitch

Correlation between midgap interface state density and thickness‐averaged oxide stress and strain at Si/SiO2 interfaces formed by thermal oxidation of Si

Correlations between midgap interface state density (Dit) and thickness‐averaged stress in thermally grown SiO2 thin films have been investigated by infrared spectroscopy, an optical beam deflection technique, and capacitance‐voltage measurements. We find no correlations between Dit and either (i) the maximum stress in the Si or SiO2 at the Si/SiO2 interface or (ii) the stress gradient in the SiO2 film. By direct measurements of the strain‐induced bending of the Si wafer, and by calculating the microscopic strain from the SiOSi bond‐stretching vibrational frequency, we have established linear relationships between Dit and the thickness‐averaged stress and strain in the oxide.

Atomic structure in SiO2 thin films deposited by remote plasma‐enhanced chemical vapor deposition

We have studied selected structure‐dependent properties of thin films of SiO2 prepared by remote plasma‐enhanced chemical vapor deposition (remote PECVD) and thermal oxidation of crystalline silicon, and have identified process‐dependent differences in their local atomic structures. We have determined the frequency ν and linewidth Δν of the Si–O bond‐stretching infrared‐active vibration near 1075 cm−1, and have found that all relatively thick oxide films, t>1000 A, prepared by either of these two techniques display the same linear relationship between Δν and ν. This behavior has been interpreted in terms of a central force model that gives the average bond angle 2θ at the oxygen atom sites, and attributes the linewidth to a distribution of vibration modes associated with a ±30° spread in 2θ. We have determined that (i) in remote PECVD films deposited at temperatures (Ts ) between 200 and 350 °C, 2θ varies between 140° and 144°; (ii) in thermal oxides grown over a temperature range (Tox ) between 800 and 1...

Thermal stabilization of device quality films deposited at low temperatures

The effects of postdeposition furnace annealing, at temperatures typical of metal–oxide semiconductor (MOS) fabrication processes, on gate oxides formed by remote plasma‐enhanced chemical vapor deposition (remote PECVD) are discussed. SiO2 films were prepared by (1) remote PECVD at substrate temperatures of 200 and 400 °C, and (2) by thermal oxidation of silicon at temperatures from 850 to 1150 °C. Postdeposition thermal processing was carried out in industrial‐type diffusion furnaces in both N2/O2 and N2/H2 ambients over a temperature range of 400–1050 °C. Film properties were studied by infrared spectroscopy, ellipsometry, and by measurements of capacitance voltage (C–V) characteristics in MOS device structures. Postdeposition thermal processing at temperatures of 400 °C and above was shown to modify both the structure and electrical properties of deposited SiO2 films. It is shown that changes in the as‐deposited film properties occur by two different relaxation mechanisms, one of which is operative in the temperature range up to 750 °C and the other from 750 to 1050 °C, and both of which are different from the viscoelastic relaxation process observed in thermally grown SiO2.The effects of postdeposition furnace annealing, at temperatures typical of metal–oxide semiconductor (MOS) fabrication processes, on gate oxides formed by remote plasma‐enhanced chemical vapor deposition (remote PECVD) are discussed. SiO2 films were prepared by (1) remote PECVD at substrate temperatures of 200 and 400 °C, and (2) by thermal oxidation of silicon at temperatures from 850 to 1150 °C. Postdeposition thermal processing was carried out in industrial‐type diffusion furnaces in both N2/O2 and N2/H2 ambients over a temperature range of 400–1050 °C. Film properties were studied by infrared spectroscopy, ellipsometry, and by measurements of capacitance voltage (C–V) characteristics in MOS device structures. Postdeposition thermal processing at temperatures of 400 °C and above was shown to modify both the structure and electrical properties of deposited SiO2 films. It is shown that changes in the as‐deposited film properties occur by two different relaxation mechanisms, one of which is operative in ...

Local atomic structure at thermally grown Si/SiO2 interfaces

Abstract This paper presents an experimental study of the properties of SiO 2 and Si, in the immediate vicinity of thermally grown SiO 2 /Si interfaces. We have examined properties of the SiO 2 films, including the center frequency and width of the SiO IR-active bond-stretching vibration, the optical index of refraction at 632.8 nm, and the intrinsic growth stress, as well as the photoreflectance and Raman scattering of the Si substrate at the growth interface. We have interpreted the temperature and thickness dependence of these properties in terms of a model which includes the molar volume mismatch between the SiO 2 and Si at the growth interface, and visco-elastic relaxation of the oxide. We conclude that the thermal history of SiO 2 films is generally non-homogeneous due to differences between the processing times, and the times for visco-elastic relaxation of the interface-generated stress. Even under conditions approaching a homogeneous thermal history, there are still significant stress gradients in the SiO 2 und underlying Si in the immediate vicinity of the SiO 2 /Si interface.

The effect of post-deposition thermal processing on MOS gate oxides formed by remote PECVD

The effects of post-deposition thermal exposure, at temperatures typical of MOS fabrication processes, on gate oxides formed by remote plasma enhanced chemical vapor deposition (RPECVD) is discussed. SiO2 films were prepared by (1) thermal oxidation of silicon at temperatures from 700 to 1150° C, and (2) by RPECVD at a substrate temperature of 350° C. Post deposition thermal processing was achieved by rapid thermal annealing for 100 sec from 850–1200° C. Film properties were studied by infrared spectroscopy (IR), ellipsometry, and by measurements of stress, capacitance voltage characteristics, and dielectric breakdown. Post-formation, thermal processing in the range of 850–1200° C was shown to modify both thermally grown and deposited oxides, but it has been shown that RPECVD films could be stabilized against post-deposition changes by rapid thermal annealing at temperatures of about 900° C for periods of at least 100 sec.

Formation Of Silicon-Based Heterostructures In Multichamber Integrated-Processing Thin-Film Deposition Systems

This paper describes the formation of heterostructure devices using multichamber, integrated-processing thin-film deposition systems with UHV-compatible inter-chamber transfer. We describe the application of remote plasma-enhanced chemical-vapor deposition (Remote PECVD) for deposition of semiconducting and dielectric thin films in representative device structures. Special attention is directed to: i) deposition conditions necessary for control of thin-film and interface chemistry; and ii) post-deposition-annealing for the stabilization of physical and electronic properties of the heterostructures, including the interfaces between the constituent layers.

A Multichamber Integrated-Processing UHV System For The Formation Of Silicon Heterostructures On Three-Inch Wafers

This paper describes the design and construction of a multichamber integrated dielectric processing system. We describe a methodology for managing the design process of complex integrated-processing systems which includes model building and computer aided design. The advantages of a flexible modular approach to integrated processing are discussed. The finished system has three processing and analysis modules networked by a central server with capabilities for (i) remote plasma enhanced chemical vapor deposition (PECVD) of dielectric films, (ii) downstream cleaning of semiconductor surfaces, and (iii) in-situ materials characterization by Auger electron spectroscopy (AES) and reverse view low energy electron diffraction (LEED). With this integrated processing system we have the capability of depositing and analyzing Si-based heterostructures which can be fabricated to include any combination of silicon oxide; silicon nitride; silicon oxynitride; and amorphous, microcrystalline, or polycrystalline silicon layers.

Formation of silicon‐based heterostructures in multichamber integrated‐processing thin‐film deposition systems

This paper describes the formation of heterostructure devices using multichamber integrated‐processing thin‐film deposition systems: clustered processing‐tools with UHV‐compatible inter‐chamber transfer. The application of remote plasma‐enhanced chemical‐vapor deposition (remote PECVD) for the formation of semiconducting and dielectric thin films in several device structures is discussed. Special attention is directed to (i) the deposition conditions required for control of layer and interface chemistry, and (ii) post‐deposition‐annealing (PDA) for the modification of physical and electronic properties of the individual layers and their interfaces. Due to limitations on in situ patterning, each of the device structures is completed after removal from the cluster. A criterion is proposed for the evaluation of multichamber processing systems that is based on the ability to form multilayer structures with two or more electronically significant interfaces without the removal of the heterostructure from the cl...