Jacek K. Tyminski

Analysis of OPC optical model accuracy with detailed scanner information

Production optical proximity correction (OPC) tools employ compact optical models in order to accurately predict complicated optical lithography systems with good theoretical accuracy. Theoretical accuracy is not the same as usable prediction accuracy in a real lithographic imaging system. Real lithographic systems have deviations from ideal behavior in the process, illumination, projection and mechanical systems as well as in metrology. The deviations from the ideal are small but non-negligible. For this study we use realistic process variations and scanner values to perform a detailed study of useful OPC model accuracy vs. the variation from ideal behavior and vs. theoretical OPC accuracy. The study is performed for different 32nm lithographic processes. The results clearly show that incorporating realistic process, metrology and imaging tool signatures is significantly more important to predictive accuracy than small improvements in theoretical accuracy.

Source-mask optimization (SMO): from theory to practice

Source Mask Optimization techniques are gaining increasing attention as RET computational lithography techniques in sub-32nm design nodes. However, practical use of this technique requires careful considerations in the use of the obtained pixilated or composite source and mask solutions, along with accurate modeling of mask, resist, and optics, including scanner scalar and vector aberrations as part of the optimization process. We present here a theory-to-practice case of applying ILT-based SMO on 22nm design patterns.

Polarization-dependent proximity effects

To meet the imaging resolution requirements, driven by the evolution of IC design rules, leading-edge scanners incorporate projection lenses with hyper-NAs. Moreover, immersion scanners are being introduced into IC manufacture. Both dry and immersion tools explore the lens design regimes of unprecedented complexity. The need to predict, to analyze and to control the IC pattern CDs is met by various photolithography simulators. The continuing demand for simulation accuracy is reflected by the requirement to quantify the scanner projection lens fingerprints, i.e. projection lens infinitesimal excursions from the ideal performance. The scanner engineering community has been relying on photolithography simulators to analyze the impact of the projection lens fingerprints on the imaging characteristics. However small, these excursions are always present in the projection tools and they control important imaging characteristics such as overlay, CD uniformity, across-field exposure latitude, to name but a few. Customarily, phase front aberrations and lens pupil apodization signatures have been used to predict the scanners imaging responses. Of course, the need to design, to manufacture and to deploy scanners of ever improving quality resulted in dramatic reductions of these non-ideal imaging excursions. The evolution of IC designs and imaging tools complexity escalate the requirements for imaging simulation accuracy. Simultaneously, predicting scanner imaging response has become a key mission in the Deign For Manufacture arena. In view of these developments, it necessary to pose a question if the conventional equipment engineering and imaging simulation methodologies predict scanner imaging responses with the accuracy required by the IC design rules. Differently put, the question is: what is necessary to provide simulation accuracy required by the current IC design rules? This report attempts to address these questions.

Lithographic imaging-driven pattern edge placement errors at the 10-nm node

Abstract. As new microelectronic designs are being developed, the demands on image overlay and pattern dimension control are compounded by requirements that pattern edge placement errors (EPEs) be at a single-nanometer levels. Scanner performance plays a key role in determining location of the pattern edges at different device layers, not only through overlay but also through imaging performance. The imaging contributes to edge displacement through the variations of the image dimensions and by shifting the images from their target locations. We discuss various aspects of advanced image control relevant to a 10-nm node integrated circuit design. We review a range of issues of pattern edge placement directly linked to pattern imaging. We analyze the impact of different pattern design and scanner-related edge displacement drivers. We present two examples of imaging strategies to pattern logic device metal layer cuts. We analyze EPEs of the cut images resulting from optimized layout design and scanner setup, and we draw conclusions on edge placement control versus imaging performance requirements.

The impact of mask design on EUV imaging

EUV exposure tools are the leading contenders for patterning critical layers at the 22nm technology node. Operating at the wavelength of 13.5nm, with modest projection optics numerical aperture (NA), EUV projectors allow less stringent image formation conditions. On the other hand, the imaging performance requirements will place high demands on the mechanical and optical properties of these imaging systems. A key characteristic of EUV projection optics is the application of a reflective mask, which consists of a reflective multilayer stack on which the IC layout is represented by the reflectivity discontinuities1. Several mask concepts can provide such characteristics, such as thick absorbers on top of a reflective multi-layer stack, masks with embedded absorbers, or absorber-free masks with patterns etched in a reflective multilayer. This report analyzes imaging performance and tradeoffs of such new mask designs. Various mask types and geometries are evaluated through imaging simulations. The applied mask models take into account the topographic nature of the mask structures, as well as the fundamental, vectorial characteristics of the EUV imaging process. Resulting EUV images are compared in terms of their process stability as well as their sensitivities to the EUV-specific effects, such as pattern shift and image tilt, driven by the reflective design of the exposure system and the mask topography. The simulations of images formed in EUV exposure tools are analyzed from the point of view of the EUV mask users. The fundamental requirements of EUV mask technologies are discussed. These investigations spotlight the tradeoffs of each mask concept and could serve as guidelines for EUV mask engineering.

The impact of illuminator signatures on optical proximity effects

Low pass filtering taking place in the projection tools used by the IC industry leads to a range of optical proximity effects, OPEs, resulting in undesired characteristics of patterns projected by the scanners. Commonly used scanner imaging models are capable of capturing OPEs driven by the fundamental imaging conditions such as wavelength, illuminator layout, reticle technology, and lens numerical aperture.

The Impact of Scanner Model Vectorization On Optical Proximity Correction

Low pass filtering taking place in the projection tools used by IC industry leads to a range of optical proximity effects resulting in undesired IC characteristics. To correct these predicable OPEs, EDA industry developed various, model-based correction methodologies. Of course, the success of this mission is strongly dependent on how complete the imaging models are. To represent the image formation and to capture the OPEs, the EDA community adopted various models based on simplified representations of the projection tools. Resulting optical proximity correction models are capable of correcting OPEs driven by the fundamental imaging conditions such as wavelength, illuminator layout, reticle technology, and lens numerical aperture, to name a few. It is well known in the photolithography community that OPEs are dependent on the scanner characteristics. Therefore, to reach the level of accuracy required by the leading edge IC designs, photolithography simulation has to include systematic scanner fingerprint data. These tool fingerprints capture excursions of the imaging tools from the ideal imaging setup conditions. They quantify the performance of key projection tool components such as illuminator and lens signatures. To address the imaging accuracy requirements, the scanner engineering and the EDA communities developed OPC models capable of correcting for imaging tools engineering attributes captured by the imaging tools fingerprints. Deployment of immersion imaging systems has presented the photolithography community with new opportunities and challenges. These advanced scanners, designed to image in deep sub-wavelength regime, incorporate features invoking the optical phenomena previously unexplored in commercial scanners. Most notably, the state of the art scanners incorporate illuminators with high degree of polarization control and projection lenses with hyper-NAs. The image formation in these advanced projectors exploits a wide range of vectorial interactions originating at the illuminator, on the pattern mask, in the projection lens and at the wafer. The presence of these, previously subdued phenomena requires that the imaging simulation methodologies be refined, increasing the complexity of the OPE models and optical proximity correction methodologies.

Finite Element Models of Lithographic Mask Topography

Photolithography simulations are widely used to predict, to analyze and to design imaging processes in scanners used for IC manufacture. The success of these efforts is strongly dependent on their ability to accurately capture the key drivers responsible for the image formation. Much effort has been devoted to understanding the impacts of illuminator and projection lens models on the accuracy of the lithography simulations [1-3]. However, of equal significance is the role of the mask models and their interactions with the illuminator models.

Scanner-dependent optical proximity effects

Optical imaging of IC critical designs is impacted by optical proximity effects, OPEs, originating from finite numerical aperture of projection lenses used in modern projectors. The OPEs are caused by filtering of pattern diffraction orders falling outside of the lens band pass. Controlling OPEs is so critical to IC performance, that IC design community implemented optical proximity correction, OPC, modifying the IC mask patterns to provide wafer images matching the IC design intent. The mainstream OPC uses optical models representing fundamental imaging setup and it does not capture the impacts of engineering scanner tool constraints. The OPEs are impacted by scanner lens and illuminator signatures causing CD excursions large in comparison to the CD error budgets(1). The magnitude of the scanner impacts on OPEs necessitated new optical modeling paradigm involving imaging models imbedding scanner signatures representing population of scanners of a given type. These scanner-type based models represent quantum leap in accuracy of lithography simulation technology, resulting in OPE and OPC representing a broad range of realistic scanner characteristics(2). In this context, a relevant question is: to what degree, the signatures of individual scanners impact the accuracy of imaging models and OPE predictions? To answer this question, we analyzed optical proximity responses of hyper-NA scanners represented by their signatures. We first studied a set of OPEs impacted by the scanner-type signatures. We then generated a set of corresponding OPEs impacted by the signatures of individual scanners. We compared the two kinds of OPEs and highlighted the scanner-specific image formation responses.

Single lithography exposure edge placement model

This report presents a model to predict, analyze, and monitor pattern edge placements errors occurring during integrated circuit manufacture. The edge placement errors are driven by overlay and imaging capabilities of scanners and pattering tools. The model can be used to analyze the impact of various imaging strategies on pattern placement statistics of layers composing ICs. Such analysis is essential to both, IC designers and lithography engineers, striving to successfully fabricate complex designs at economical manufacture yields. The report discusses key contributors to the image edge placement errors and presents examples of edge placement predictions based on scanner records. The edge placement error examples presented in this report are based on scanner overlay and CD uniformity performance for the current generation of integrated circuit designs.