Jadav Chandra Das

Reversible Binary to Grey and Grey to Binary Code Converter using QCA

ABSTRACT Quantum dot-cellular automata (QCA) is an emerging nanotechnological archetype and has widespread applications in designing nanoscale reversible circuit for nanocomputing. The low power consumption, faster operating speed, and low circuit area of QCA pledge the energy efficient design of logic circuit having high device complexity. This paper demonstrates the design of reversible binary to grey and grey to binary code converter based on Feynman gate using QCA for the first time. Both the proposed reversible code converter circuits have quantum cost as 2. The conversion of binary to grey code is achieved with only one garbage value and the grey to binary code conversion is achieved without any garbage value. The proposed Feynman gate circuit required only 38,880 nm2 areas and three clocking zones. The reversible binary to grey circuit required only 92,664 nm2 areas and three clocking zones whereas the reversible grey to binary circuit required only 139,968 nm2 areas and four clocking zones. The proposed design can be used to realise the nanoarchitecture in computer communication having low power consumption. The evaluation of simulation outcomes of proposed circuit with theoretical knowledge established the functional efficiency of the circuits. The circuits are designed and simulated by QCA Designer-2.0.3.

Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication

Quantum-dot cellular automata (QCA) is an emerging area of research in reversible computing. It can be used to design nanoscale circuits. In nanocommunication, the detection and correction of errors in a received message is a major factor. Besides, device density and power dissipation are the key issues in the nanocommunication architecture. For the first time, QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gate have been achieved in this study. Using the proposed parity generator and parity checker circuit, a nanocommunication architecture is proposed. The detection of errors in the received message during transmission is also explored. The proposed QCA Feynman gate outshines the existing ones in terms of area, cell count, and delay. The quantum costs of the proposed conventional reversible circuits and their QCA layouts are calculated and compared, which establishes that the proposed QCA circuits have very low quantum cost compared to conventional designs. The energy dissipation by the layouts is estimated, which ensures the possibility of QCA nano-device serving as an alternative platform for the implementation of reversible circuits. The stability of the proposed circuits under thermal randomness is analyzed, showing the operational efficiency of the circuits. The simulation results of the proposed design are tested with theoretical values, showing the accuracy of the circuits. The proposed circuits can be used to design more complex low-power nanoscale lossless nanocommunication architecture such as nano-transmitters and nano-receivers.

Reversible Comparator Design Using Quantum Dot-Cellular Automata

ABSTRACT Quantum dot-cellular automata (QCA) emerge as a research area to design nanometre scale logic circuit. In digital logic design, a comparator is the fundamental building block that performs the comparison of two numbers. This paper deals with the design of reversible building block for 1-bit comparator and its implementation in QCA. An improved QCA layout of Feynman gate is also achieved. The QCA Feynman gate is denser and has low delay than the existing circuit. The proposed reversible comparator has quantum cost 9, whereas the QCA reversible comparator has the quantum cost 0.927. The quantum cost based comparison of the proposed QCA reversible comparator with conventional reversible comparator shows the cost effective circuit design in QCA. The simulation result matched the truth table of comparator which approves the functional capability of the proposed QCA layout of comparator. All the proposed layouts dissipate very low power.

Novel low power reversible binary incrementer design using quantum-dot cellular automata

Abstract This paper demonstrates the design of n -bit novel low power reversible binary incrementer in Quantum-Dot Cellular Automata ( QCA). The comparison of quantum cost in quantum gate based approach and in QCA based design agreed the cost efficient implementation in QCA. The power dissipation by proposed circuit is estimated, which shows that the circuit dissipates very low heat energy suitable for reversible computing. All the circuits are evaluated in terms of logic gates, circuit density and latency that confirm the faster operating speed at nano scale. The reliability of the circuit under thermal randomness is explored which describes the efficiency of the circuit.

Quantum Dot-Cellular Automata based cipher text design for nano-communication

Quantum Dot-Cellular Automata (QCA) is a new nanotechnology model that serves as an alternative solution to CMOS that have many physical limits and lots of circuitry bounds. QCA is a transistor less technology and here information is passed based on the charge on electron and by mutual electrostatic repulsion between them. QCA has very high device density, faster switching speed clocking and extremely low power consumption. In cryptographic application QCA circuits can play a major role. Both encryption and decryption process is implemented using QCA based logic circuit. This paper describes the basic way to generate cipher text in QCA that can be helpful in QCA based secure nanocommuncation. The implementation and testing of results is performed using QCA Designer-2.0.3.

Nanocommunication network design using QCA reversible crossbar switch

Abstract Crossbar switch is an essential component in communication network like telephony and circuit switching network to process information. This paper deals with the design of reversible 2 × 2 crossbar switch and its realization in Quantum-Dot Cellular Automata (QCA) for the first time. The proposed switch is applied to a nanocommunication circuit and its impact on information processing is observed and explored. Several parameters like logic gates, density and latency are considered to evaluate the design which confirms faster operating speed and high device density. Proposed reversible QCA circuits are compared with similar traditional circuits in terms of circuit cost. The comparison outlines that the proposed QCA circuits are cost efficient than that of similar traditional circuits. The estimation of power dissipation shows that the proposed crossbar switch has very low power dissipation suitable for reversible computing. The stuck-at-fault effect on the crossbar switch and nanocommunication circuit is also explored.

Circuit switching with Quantum-Dot Cellular Automata

Abstract Circuit switched network is a fundamental component to transmit the input signal among different users within a distributed communication networks. This paper demonstrates the design of a novel fault-tolerant circuit switched network based on Quantum-Dot Cellular Automata (QCA). The design is achieved in a single layer. To design this communication network, a novel crossbar switch is proposed in this paper. The proposed circuit switched network has the major building blocks as multiplexer, demultiplexer and crossbar switch. Stuck-at-fault at the inputs as well as at the outputs is explored to design fault free circuit for crossbar switch. How the communication through crossbar switch as well as circuit switched network is disrupted due to control signal, is also demonstrated. All those proposed QCA layouts have low energy dissipation, which is shown by exploring the dissipated energy by the layouts. The designs are evaluated in terms of area, latency and logic gates. The designs are verified through matching up the results with the truth tables.

Design of novel carry save adder using quantum dot-cellular automata

Abstract Complex adder designs in Quantum Dot-Cellular Automata (QCA) are primary focus of researchers on lowering cell-count, delay and QCA gates. The cell count, area and delay of two input adders such as Brent-Kung, Ladner-Ficher, Han-Carlson and Kogg-Stone are at least doubles when three numbers are added, compared to adding two numbers. Besides, the interconnected QCA wires for these adders decrease the addition time. To eliminate this problem, a new 4-bit Carry Save Adder (CSA) is proposed in this paper. To design the CSA circuit, a novel design of full adder circuit using 5-input majority gate (MV) has been proposed. The proposed design has around 11.76% improvement in cell count and 33.33% improvement in latency compared to the existing QCA full-adders. Besides, when three binary numbers are added, CSA is far more advantageous compared to similar addition using two input prefix adders, in terms of QCA cell count, area and clock delay. Compared to 4-bit traditional adders, proposed CSA has around 80% decreases in overall circuit cost. The QCA layout of CSA is the first one of its kind. An improved QCA layout of a 4-bit ripple carry adder (RCA) is also proposed in this paper. The RCA has around 7.6% improvement in cell count, 33.33% improvement in latency and around 5.56% improvement in overall cost over compared to the existing layouts.

Computational fidelity in reversible quantum-dot cellular automata channel routing under thermal randomness

Abstract The computational fidelity is the measure, which imposes the knowledge about how far any noisy computational channel resembles the accurate output for the distribution of the same input. The logical operations and signalpropagation through semiconductor quantum-dot cellular automata (QCA) having different cell’s polarization are affected with environmental noise such as thermal randomness. This paper outlines the computational fidelity in reversible QCA channel routing for noiseless, as well as noisy reversible QCA channels. To show the fidelity for reversible QCA channels, QCA based Feynman gate, Fredkin gate, Peres gate and Toffoli gate have been assumed as a reversible routing channels. Shannon’s theory has been applied to measure the fidelity, which confirms the robustness in reversible QCA channel routing. The temperature range at which reversible QCA channels yield trustworthy computation is proposed in this article. It is established that the computational fidelity of the routing channels deteriorates with thermal randomness. On an average, those routing channels have reliable fidelity when perform computation in between 1K to 10K temperatures. Hence, all the routing channels yield considerable computational fidelity over the low thermal regions. The evaluation of theoretical values through simulation results establishes the design accuracy for the proposed reversible QCA routing channels.

Reversible binary subtractor design using quantum dot-cellular automata

In the field of nanotechnology, quantum dot-cellular automata (QCA) is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor (CMOS) circuit. QCA has high device density, high operating speed, and extremely low power consumption. Reversible logic has widespread applications in QCA. Researchers have explored several designs of QCA-based reversible logic circuits, but still not much work has been reported on QCA-based reversible binary subtractors. The low power dissipation and high circuit density of QCA pledge the energy-efficient design of logic circuit at a nano-scale level. However, the necessity of too many logic gates and detrimental garbage outputs may limit the functionality of a QCA-based logic circuit. In this paper we describe the design and implementation of a DG gate in QCA. The universal nature of the DG gate has been established. The QCA building block of the DG gate is used to achieve new reversible binary subtractors. The proposed reversible subtractors have low quantum cost and garbage outputs compared to the existing reversible subtractors. The proposed circuits are designed and simulated using QCA Designer-2.0.3.