Jae-won Choi

Wide Dynamic-Range CMOS RMS Power Detector

This paper presents a wide dynamic range (DR) CMOS root-mean-square power detector with a temperature variation compensation technique in a 28-nm CMOS process. The cascaded gain amplifiers and squaring circuits in the proposed power detector can achieve wide DR with the power level segmented detection method using a switch driver with the help of a modem. A 12-bit current digital-to-analog converter is used to calibrate dc offset in the power detector with 25- μV steps to improve the accuracy. Measured DR is more than 40 dB from 700 MHz to 4 GHz. A temperature compensation bias circuit improves the performance of the detector with maximum 0.8-dB error over the temperature range -30°C ~ 90°C. The chip area is 333 μm× 450 μm and the power consumption is from 5.8 to 11.8 mW depending on the input power using a 1.8-V power supply.

An RF receiver for multi-band inter- and intra-band carrier aggregation

An RF receiver for carrier aggregation employing a low noise amplifier with a current reusing technique and a frequency-band switchable transformer is demonstrated in a 28nm LP CMOS technology. The proposed single-ended low-noise amplifier can support multiple-channel RF signals for both inter- and intra-band carrier aggregation with high performance and low DC current consumption. Moreover, a frequency-band switchable transformer is developed to realize a size-efficient receiver for handling three carrier components carrier aggregation. The receiver operates at frequency bands, ranging from 0.7 to 2.7 GHz. The receiver has conversion gain more than 70 dB and noise figure of less than 3.5 dB for all carrier aggregation combinations.