Jaehyuk Cha

Performance Trade-Offs in Using NVRAM Write Buffer for Flash Memory-Based Storage Devices

While NAND flash memory is used in a variety of end-user devices, it has a few disadvantages, such as asymmetric speed of read and write operations, inability to in-place updates, among others. To overcome these problems, various flash-aware strategies have been suggested in terms of buffer cache, file system, FTL, and others. Also, the recent development of next-generation nonvolatile memory types such as MRAM, FeRAM, and PRAM provide higher commercial value to non-volatile RAM (NVRAM). At todays prices, however, they are not yet cost-effective. In this paper, we suggest the utilization of small-sized, next-generation NVRAM as a write buffer to improve the .overall performance of NAND flash memory-based storage systems. We propose various block-based NVRAM write buffer management policies and evaluate the performance improvement of NAND flash memory-based storage systems under each policy. Also, we propose a novel write buffer-aware flash translation layer algorithm, optimistic FTL, which is designed to harmonize well with NVRAM write buffers. Simulation results show that the proposed buffer management policies outperform the traditional page-based LRU algorithm and the proposed optimistic FTL outperforms previous log block-based FTL algorithms, such as BAST and FAST.

LRU-WSR: integration of LRU and writes sequence reordering for flash memory

Most mobile devices are equipped with a NAND flash memory even if it has characteristics of not-in-place update and asymmetric I/O latencies among read, write, and erase operations: write/erase operations are much slower than a read operation in a flash memory. For the overall performance of a flash memory system, the buffer replacement policy should consider the above severely asymmetric I/O latencies. However, existing LRU buffer replacement algorithm cannot deal with the above problem. This paper proposes the LRU-WSR buffer replacement algorithm that enhances LRU by reordering writes of not-cold dirty pages from the buffer cache to flash storage. The enhanced LRU-WSR algorithm focuses on reducing the number of write/erase operations as well as preventing serious degradation of buffer hit ratio. The experimental results show that the LRU-WSR outperforms other algorithms including LRU, CF-LRU, and FAB1.

Deduplication in SSDs: Model and quantitative analysis

In NAND Flash-based SSDs, deduplication can provide an effective resolution of three critical issues: cell lifetime, write performance, and garbage collection overhead. However, deduplication at SSD device level distinguishes itself from the one at enterprise storage systems in many aspects, whose success lies in proper exploitation of underlying very limited hardware resources and workload characteristics of SSDs. In this paper, we develop a novel deduplication framework elaborately tailored for SSDs. We first mathematically develop an analytical model that enables us to calculate the minimum required duplication rate in order to achieve performance gain given deduplication overhead. Then, we explore a number of design choices for implementing deduplication components by hardware or software. As a result, we propose two acceleration techniques: sampling-based filtering and recency-based fingerprint management. The former selectively applies deduplication based upon sampling and the latter effectively exploits limited controller memory while maximizing the deduplication ratio. We prototype the proposed deduplication framework in three physical hardware platforms and investigate deduplication efficiency according to various CPU capabilities and hardware/software alternatives. Experimental results have shown that we achieve the duplication rate ranging from 4% to 51%, with an average of 17%, for the nine workloads considered in this work. The response time of a write request can be improved by up to 48% with an average of 15%, while the lifespan of SSDs is expected to increase up to 4.1 times with an average of 2.4 times.

VSSIM: Virtual machine based SSD simulator

In this paper, we present a virtual machine based SSD Simulator, VSSIM (Virtual SSD Simulator). VSSIM intends to address the issues of the trace driven simulation, e.g. trace re-scaling, accurate replay, etc. VSSIM operates on top of QEMU/KVM with software based SSD module. VSSIM runs in realtime and allows the user to measure both the host performance and the SSD behavior under various design choices. VSSIM can flexibly model the various hardware components, e.g. the number of channels, the number of ways, block size, page size, planes per chip, program, erase, read latency of NAND cells, channel switch delay, and way switch delay. VSSIM can also facilitate the implementation of the SSD firmware algorithms. To demonstrate the capability of VSSIM, we performed a number of case studies. The results of the simulation study deliver an important guideline in the firmware and hardware designs of future NAND based storage devices. Followings are some of the findings: (i) as the page size increases, the performance benefit of increasing the channel parallelism against increasing the way parallelism becomes less significant, (ii) due to the bi-modality in IO size distribution, FTL should be designed to handle multiple mapping granularity, (iii) hybrid mapping does not work in four or more way SSD due to severe log block fragmentation, (iv) as a performance metric, the Write Amplification Factor can be misleading, (v) compared to sequential write, random write operation can be benefited more from the channel level parallelism and therefore in multi-channel environment, it is beneficial to categorize larger fraction of IO as random. VSSIM is validated against commodity SSD, Intel X25M SSD. VSSIM models the sequential IO performance of X25M within 3% offset.

Identification of novel anti-angiogenic factors by in silico functional gene screening method

Angiogenesis, the formation of new blood vessels out of pre-existing capillaries, occurs in a variety of pathophysiological conditions, and is regulated by a balance of angiogenic activators and inhibitors. To identify novel angiogenic factors, we developed a gene screening method by combining the prediction analysis of transcription factor (TF) binding site and the chromosomal localization analysis. First, we analyzed the promoter sequences from known angiogenesis-related factors using the MATINSPECTOR program in TRANSFAC database. Interestingly, we found that the binding site of LMO2 complex is highly conserved in the promoter regions of these factors. Second, we analyzed chromosome loci based on the hypothesis that angiogenesis-related factors might be co-localized in a specific chromosomal band. We found that angiogenesis-related factors are localized in specific 14 chromosomal bands including 5q31 and 19q13 using AngioDB and LocusLink database mining. From these two approaches, we identified 32 novel candidates that have the LMO2 complex binding site in their promoter and are located on one of 14 chromosomal bands. Among them, human recombinant troponin T and spectrin markedly inhibited the neovascularization in vivo and in vitro. Collectively, we suggest that the combination of the prediction analysis of TF binding site and the chromosomal localization analysis might be a useful strategy for gene screening of angiogenesis.

IO Workload Characterization Revisited: A Data-Mining Approach

Over the past few decades, IO workload characterization has been a critical issue for operating system and storage community. Even so, the issue still deserves investigation because of the continued introduction of novel storage devices such as solid-state drives (SSDs), which have different characteristics from traditional hard disks. We propose novel IO workload characterization and classification schemes, aiming at addressing three major issues: (i) deciding right mining algorithms for IO traffic analysis, (ii) determining a feature set to properly characterize IO workloads, and (iii) defining essential IO traffic classes state-of-the-art storage devices can exploit in their internal management. The proposed characterization scheme extracts basic attributes that can effectively represent the characteristics of IO workloads and, based on the attributes, finds representative access patterns in general workloads using various clustering algorithms. The proposed classification scheme finds a small number of representative patterns of a given workload that can be exploited for optimization either in the storage stack of the operating system or inside the storage device.

LIRS-WSR: integration of LIRS and writes sequence reordering for flash memory

Most of the mobile devices are equipped with NAND flash memories even if it has characteristics of not-in-place update and asymmetric I/O latencies among read, write, and erase operations: a write/erase operation is much slower than a read operation in a flash memory. For the overall performance of a flash memory system, the buffer replacement policy should consider the above severely asymmetric I/O latencies. Existing buffer replacement algorithms such as LRU, LIRS, and ARC cannot deal with the above problems. This paper proposes an add-on buffer replacement policy that enhances LIRS by reordering writes of not-cold dirty pages from the buffer cache to flash storage. The enhances LIRS-WSR algorithm focuses on reducing the number of write/erase operations as well as preventing serious degradation of buffer hit ratio. The trace-driven simulation results show that, among the existing buffer replacement algorithms including LRU, CF-LRU, ARC, and LIRS, our LIRSWSR is best in almost cases for flash storage systems.

Analogous Content Selection Mechanism Using Device Profile and Content Profile for U-Learning Environments

There are a lot of learning contents, that have the same contexts which are targeted specific devices, under circumstances in which diverse devices support a ‘U-Learning environment’. But the current methods selecting adequate contents have little flexibility. So, this paper we propose an analogy matched contents selection(AMCS) method which can find similar contents even though there are no exactly matched features of a learner’s device. Also, our research shows that our technique is at most two times more efficient than existing techniques.

Educational Information Search Service Using Ontology

This paper describe the case study of developing and providing the ontology-based educational information search service to overcome the limitations of the existing keyword-based search service. We used the OWL-DL 1) to build the core ontology DB from the existing metadata DB represented by the LOM, 2) to build the domain ontology DB of middle school Mathematics contents DB, 3) to merge the core ontology DB and the domain ontology DB. And both the OWL-DL and the SWRL are used to support the educational information search service. The system for the above service was built using the OWL-based deduction engine and the merged ontology DB, that process and deduct user query with enhanced simple and intuitional interface. This service is being provided as the demonstrational service by the EDUNET - the largest nationwide learning contents search system in Korea.

Enhancing Ontology-Based Educational Content Search Service with Competency

In this paper we present a methodology for designing competency based Web search framework using ontology to acquire the learning contents that meets the individualspsila competency. We used ontology with OWL-DL to built competency ontology, content ontology and domain ontology to implement competency based contents search system. The basic ontology-based search system, however, lacks the method of ranking the search results. To present more appropriate learning contents for the learner, we applied competency clustering to rank the search results.