Jagun Kwon

Ravenscar-Java: a high integrity profile for real-time Java

For many, Java is the antithesis of a high integrity programming language. Its combination of object-oriented programming features, its automatic garbage collection, and its poor support for real-time multi-threading are all seen as particular impediments. The Real-Time Specification for Java has introduced many new features that help in the real-time domain. However, the expressive power of these features means that very complex programming models can be created, necessitating complexity in the supporting real-time virtual machine. Consequently, Java, with the real-time extensions as they stand, seems too complex for confident use in high integrity systems. This paper presents a Java profile for the development of software-intensive high integrity real-time systems. This restricted programming model removes language features with high overheads and complex semantics, on which it is hard to perform timing and functional analyses. The profile fits within the J2ME framework and is consistent with well-known guidelines for high integrity software development, such as those defined by the U.S. Nuclear Regulatory Commission.

Ravenscar-Java: a high-integrity profile for real-time Java

For many, Java is the antithesis of a high‐integrity programming language. Its combination of object‐oriented programming features, its automatic garbage collection, and its poor support for real‐time multi‐threading are all seen as particular impediments. The Real‐Time Specification for Java has introduced many new features that help in the real‐time domain. However, the expressive power of these features means that very complex programming models can be created, necessitating complexity in the supporting real‐time virtual machine. Consequently, Java, with the real‐time extensions as they stand, seems too complex for confident use in high‐integrity systems. This paper presents a Java profile for the development of software‐intensive high‐integrity real‐time systems. This restricted programming model removes language features with high overheads and complex semantics, on which it is hard to perform timing and functional analyses. The profile fits within the J2ME framework and is consistent with well‐known guidelines for high‐integrity software development, such as those defined by the U.S. Nuclear Regulatory Commission. Copyright

Memory Management Based on Method Invocation in RTSJ

In this paper, we present a memory management model for the Ravenscar-Java profile. Because of the complexity and run-time overheads in verifying the proper use of the RTSJ’s scoped memory, it is unfavourable in the area of high integrity systems where any unpredictability must be cast out. Our approach maps one anonymous memory area to a user-specifiable method by means of our Java 1.5 annotation types. This straightforward model eliminates single parent rule checks and simplifies other run-time checks that are the main cause of unpredictability and overheads. In fact, it also makes the programmer’s job easier since he/she does not have to worry about creating and maintaining memory areas. All the annotated methods will be automatically converted by a transformer into an RTSJ/Ravenscar-Java compliant version. The semantics of the RTSJ remains the same, meaning that any program in our model when transformed is also a legal RTSJ program. Our key contribution is the definition of a predictable memory model and guidelines that will reduce/eliminate run-time overheads. A bonus to this is a less complicated programming model.

Assessment of the Java programming language for use in high integrity systems

This paper sets a goal of investigating the use of Java in the development of high integrity systems. Based on previous studies, guidelines, and standards, we develop 23 criteria that are used for the following assessment of Java. A summary of the assessment is provided before we go on to review a few existing subsets of the language.

Scheduling UAVs to bridge communications in delay-tolerant networks using real-time scheduling analysis techniques

We present an approach to utilising unmanned aerial vehicles (UAVs) as communication relays, in which a dynamic positioning algorithm drives UAVs automatically to achieve the best incoming and outgoing signal strength and packet throughput among participating ground nodes. This approach can be applied to real-life scenarios with widely distributed communicating nodes, for example, disasters like earthquakes with damaged communication towers, and harvesting sensor readings from distributed sensor nodes. UAVs can establish a direct communication link between multiple nodes if they are within communication ranges to the UAVs. If this is not possible, the UAVs may be scheduled to bridge communications between the nodes with some time delay. In other words, a delay tolerant network (DTN) among participating nodes can be formed whereby the UAVs fly over the nodes to collect, buffer and deliver data. This is useful in scenarios such as harvesting data from a widely distributed sensor network (e.g., flood monitoring in jungle). We provide a scheduling analysis framework to show if a UAV can cover a given set of distributed nodes. Each sensor node may have a different priority, required frequency of visits and communication range. The framework was inspired by the response-time analysis approach for scheduling tasks in the real-time scheduling literature. In essence, we analyse the worst-case response time and schedulability for a UAV to visit and process communication requests for the lowest priority node among the participants. We also demonstrate that this approach can interact with a physics simulator that models wind speed and turbulence, and learn and optimise on possible routes and positions for UAVs.

A Component Model supporting Decomposition and Composition of Consumer Electronics Software Product Lines

The component-based software engineering has been gaining attention in consumer electronics (CE) industry. New component models for CE software are emerging, but unfortunately there is no common standard established yet. Each of the proposed models focuses on satisfying some subset of requirements from CE software and there is no unified model that can handle all different requirements ofCE software. We propose a component model for component- based CE software development in the context of software product lines. The component model focuses on handling build-time structures of the software and attempts to provide a unified model that can support both componentization of legacy code and composition of new CE software in an efficient way. We also describe our experiences in prototyping a tool and applying it to one of our initial CE product line implementations.

MIREA: Component-based middleware for reconfigurable, embedded control applications

This paper presents the MIREA middleware and its support for reusable, reconfigurable and hierarchical design of complex control systems. We review the middlewares component model, key concepts and services, and its support for C++ plus its ability to integrate seamlessly with third-party libraries such as the National Institute of Standards and Technology (NIST)s Real-Time Control Systems (RCS) library, which has been successfully used in many U.S government-driven intelligent control projects. We also present a case study based on control of our flock of autonomous UAV helicopters. This represents a challenging deployment scenario, but one for which the 4D/RCS architecture is designed and is well suited. Consequently, we discuss our approach to control using a fusion of RCS as a means of architecting a real time control system and MIREA as a means of realising that architecture. Our progress to date suggests that MIREA is indeed well suited as a middleware facilitating the construction of efficient, lightweight, and scalable real-time embedded control systems.

A Lightweight, Component-Based Approach to Engineering Reconfigurable Embedded Real-Time Control Software

The cost of poor or repeat engineering in complex control systems is extremely high, and flexibility in software design and implementation is one of the key factors in staying competitive in the market. Complexity can be managed most effectively if the underlying software systems support structured, standardised, high-level abstraction layers that encapsulate unnecessary details behind well-defined interfaces. Moreover, since the costs of software maintenance are often as high as that of initial development, the ease with which it is possible flexibly to reconfigure, re-engineer, and replace software components in operational systems is also critical. In this paper, we present a lightweight, component-based approach to engineering embedded real-time control software, which is realized in the form of a middleware system named MIREA. The middleware supports dynamic reconfiguration of components written in C/C++, and addresses variability management in relation to non-functional properties, such as quality-of-service (QoS) and real-time scheduling. Users are allowed to componentize existing libraries easily, such as the standard NIST 4D/Real-time Control Systems (RCS) library, which has been successfully used in many U.S government-driven intelligent control projects, and to reuse them as dynamically reconfigurable components. A realistic illustration is provided showing how control systems are structured and reconfigured using our approach. In fact, we discuss our approach to control using a fusion of NIST RCS as a means of architecting a real time control system and MIREA as a means of realising that architecture. Our progress to date suggests that MIREA is indeed well suited as a middleware facilitating the construction of efficient, lightweight, and scalable real-time embedded control systems.

A Lightweight Component-Based Reconfigurable Middleware Architecture and State Ontology for Fault Tolerant Embedded Systems

Abstract. In this paper, we introduce a component-based software architecture that facilitates reconfigurability and state migration in a semantically correct manner for fault tolerant systems. The main focus and contribution of the paper is on the ontology framework that is based on object orientation techniques for coherent reconfiguration of software components in the events of faults at runtime, preserving state consistency and also facilitating state ontology evolution. Our proposed approach is realised in C++, which is integrated in the lightweight middleware MIREA.

Adaptive Bandwidth-Based Thread Group Scheduler for Compositional Real-Time Middleware Architectures

In this paper, we present an adaptive, bandwidth-based group scheduling mechanism that supports reconfiguration of components in compositional software architectures. The middleware-level scheduler allocates resources accurately for real-time threads while non-real-time threads are dealt with in a manner that makes the most of the remaining bandwidth within a thread group. We have designed and implemented the thread-group scheduler in the context of a middleware for embedded real-time control systems, where mixed-criticality tasks may co-exist on the same platform and temporal firewall is of immense value. Yet, it is often the case that better resource-management, flexibility and efficiency are rewarded a great deal due to the high cost of development and the bespoke nature of control systems. With the increasing complexity of large software systems, it is often difficult to reason about how architectural or compositional artefacts are to be linked with non-functional attributes, especially when it comes to scheduling of threads in reconfigurable component-based systems. In other words, there is no clean-cut binding between components and tasks or threads in terms of resource allocation and quality of service provision. For instance, when a component with a varying number of threads inside is to be replaced, it becomes challenging to allocate resources fairly and accurately due to the changing requirements (or number of threads) in the new component in terms of the required CPU time before and after the reconfiguration. The recent temporal firewall approach in the literature works well on a per-thread basis resource allocation, but when the knowledge of threads and the timing requirements are unknown at pre-runtime due to the possible replacement of components with a varying number of subordinate threads, it is impossible to allocate resources effectively. This work builds on the temporal firewall approach to cater for compositional software systems.