Jalal Kawash

Mobile virtual communities research: a synthesis of current trends and a look at future perspectives

This article is a synthesis of current research trends in mobile virtual communities. It classifies Mobile Virtual Communities (MVCs) research into appropriate domains, and categorises the different types of virtual communities with respect to three criteria: the degree of virtualisation, the degree of mobility and the degree of cooperation. It also draws some conclusions on future research directions.

Specifying memory consistency of write buffer multiprocessors

Write buffering is one of many successful mechanisms that improves the performance and scalability of multiprocessors. However, it leads to more complex memory system behavior, which cannot be described using intuitive consistency models, such as Sequential Consistency. It is crucial to provide programmers with a specification of the exact behavior of such complex memories. This article presents a uniform framework for describing systems at different levels of abstraction and proving their equivalence. The framework is used to derive and prove correct simple specifications in terms of program-level instructions of the sparc total store order and partial store order memories.The framework is also used to examine the sparc relaxed memory order. We show that it is not a memory consistency model that corresponds to any implementation on a multiprocessor that uses write-buffers, even though we suspect that the sparc version 9 specification of relaxed memory order was intended to capture a general write-buffer architecture. The same technique is used to show that Coherence does not correspond to a write-buffer architecture. A corollary, which follows from the relationship between Coherence and Alpha, is that any implementation of Alpha consistency using write-buffers cannot produce all possible Alpha computations. That is, there are some computations that satisfy the Alpha specification but cannot occur in the given write-buffer implementation.

A novel collaboration model for mobile virtual communities

The phenomenal adoption rate of mobile phone technology in different societies turned these phones into a common commodity. Telecom companies started recently offering the Third Generation (3G) services. Yet, the lack of content and the support of killer applications will continue to be a concern, especially if the 3G mobile phone technology fully matures. We believe that mobile community enablers are candidates for such killer applications. We propose a novel collaboration model for mobile virtual communities. The model is designed to support awareness, sociability, and usability. The model is versatile and simple at the same time. Its versatility admits a wide range of communities with differing purposes and interests, and its simplicity supports usable and efficient implementations. We suggest different kinds of possible applications that can be supported by the model, and we discuss the design and implementation of a prototype of the model.

Limitations and capabilities of weak memory consistency systems

This dissertation develops and exploits a formalism for specifying memory consistency models. This formalism lays down the foundations for describing memory consistency models at various levels, and develops techniques to prove the equivalence between models defined at different levels. Two levels, called non-operational and operational, are addressed in this dissertation. The non-operational level describes these models in terms of program instructions or procedures, while the operational level describes them in terms of implementation events. Formal techniques are developed to prove the equivalence of rigorous specifications at both levels. nThis formalism is then exploited to define the memory consistency models of two state-of-the-art multiprocess systems: the SPARC version 8 architecture and the Java Virtual Machine. These models are defined at both operational and non-operational levels. These operational and non-operational descriptions are proved equivalent. The SPARC models provide “reasonably” weak memory consistency models that are capable of avoiding the use of explicit synchronization primitives for certain problems. However, Java provides a consistency model that is completely dependent on synchronization primitives, without which no form of coordination between different threads is possible. nFundamental process coordination problems have been extensively studied for traditional systems with strong memory consistency. This dissertation revisits the critical section and the producer/consumer problems in the context of weak memory consistency models. It establishes that the majority of known weak memory consistency models are incapable of supporting a solution to the critical section problem without the use of explicit synchronization primitives. Surprisingly, most of these models are capable of supporting solutions to versions of the producer/consumer problem without the use of these primitives.

Tight Bounds for Critical Sections in Processor Consistent Platforms

Most weak memory consistency models are incapable of supporting a solution to mutual exclusion using only read and write operations to shared variables. Processor consistency-Goodmans version (PC-G) is an exception. Ahamad et al. showed that Petersons mutual exclusion algorithm is correct for PC-G, but Lamports bakery algorithm is not. This paper derives a lower bound on the number of and type of (single or multiwriter) variables that a mutual exclusion algorithm must use in order to be correct for PC-G. Specifically, any such solution for n processes must use at least one multiwriter variable and n single-writer variables. Petersons algorithm for two processes uses one multiwriter and two single-writer variables, and therefore establishes that this bound is tight for two processes. This paper presents a new n-process algorithm for mutual exclusion that is correct for PC-G and achieves the bound for any n. While Petersons algorithm is fair, this extension to arbitrary n is not fair. Six known algorithms that use the same number and type of variables are shown to fail to guarantee mutual exclusion when the memory consistency model is only PC-G, as opposed to the sequential consistency model for which they were designed. A corollary of our investigation is that, in contrast to sequential consistency, multiwriter variables cannot be implemented from single-writer variables in a PC-G system

Building Mobile Virtual Communities for Public Transport Awarness

The collaboration between bus operators and community members is the next logical step in the evolution of truly live bus tracking and timing inquiries. In this paper, we present a prototype software system that supports the creation of a collaborative mobile virtual community for public transport awareness. The system makes use of location determination technology to track the users locations and supplies them with live bus-arrival times and appropriate notifications. The system is built using three-tier architecture and requires minimum user interaction

Implementing sequentially consistent programs on processor consistent platforms

Designers of distributed algorithms typically assume strong memory consistency guarantees, but system implementations provide weaker guarantees for better performance and scalability. This motivates the study of how to implement programs designed for sequential consistency on platforms with weaker consistency models. Typically, such implementations are impossible using only read and write operations to shared variables. One variant of processor consistency originally proposed by Goodman and called here PC-G is an exception because it provides just enough consistency to implement mutual exclusion using only reads and writes. This paper investigates the existence of compilers to convert arbitrary programs that use shared read/write variables with sequentially consistent memory semantics, to programs that use read/write variables with PC-G consistency semantics. We first provide a simple program transformation, and prove that it correctly compiles any 2-process program to a PC-G memory system, while preserving wait-freedom. We next prove that even a substantial generalization of this transformation cannot be a compiler for even a very restricted class of 3-process programs. Even though our program transformation is not a general compiler for three or more processes, it does correctly transform some specific n-process programs. In particular, for the special case of the (necessarily randomized) Test&Set algorithm of Tromp and Vitanyi, our transformation extends to any number of processes, thus providing the first algorithm for expected wait-free Test&Set on any weak memory system, using only read/write variables.

What is Itanium Memory Consistency from the Programmer's Point of View?

A programmer-centric model describes the memory consistency rules of amultiprocessor as a collection, one for each processor, of views of instructions and some agreements between these views. It also requires the natural notion of validity: the value read from a shared memory location is the one that was most recently stored, according to a given view. This allows reasoning about programs at a non-operational level in the natural way, not obscured by the implementation details of the underlying architecture. In this paper, we formulate a programmer-centric description of the memory consistency model provided by the Itanium architecture. However, our definition is not tight. We provide two very similar definitions and show that the specification of the Itanium memory model lies between the two. These two definitions are motivated by slightly different implementations of load-acquire instructions. A further entertainment of a handful of other load-acquire rules leads us to question whether the specification of the Itanium memory order [Intel Corporation. A formal specification of the intel itanium processor family memory ordering. http://www.intel.com/, Oct 2002] is indeed faithful to the Itanium architecture intentions.

Pitfalls in Memory Consistency Modelling

Five pitfalls or potential mistakes in memory consistency modelling are identified. Each pitfall can have dramatic impact on our ability to write correct and efficient programs, to determine the algorithmic capabilities or limitations of particular architectures, and to compare various systems. These potential problems are highlighted by illustrating each pitfall with examples from known consistency model definitions.

Tele-Medika: a data mining empowered web portal for online health

The Swinfen Charitable Trust (SCT) provides an e-referral service for health practitioners in developing countries. Referral messages and responses are passed by email. We have developed a Web-based system to facilitate information retrieval from these messages and multimedia data mining. The system contains a search engine which implements full text searching, together with nearness-based retrieval. In pilot testing, cases with relatively high nearness ranking were reasonably near to the query cases. In addition, a Support Vector Machine (SVM) was used to classify cases into categories of gender and age. False positives did not increase significantly with the number of true positives, i.e. this represented very good classification performance. The system we have developed appears to be a promising way of storing and retrieving email-based medical correspondence.