Jalil Boukhobza

Energy Consumption Modeling of H.264/AVC Video Decoding for GPP and DSP

Mobile devices such as smart-phones and tablets are becoming the most important channel for delivering end-user Internet traffic especially multimedia content. One of the most popular multimedia application is video streaming. The video decoding process of this application is compute-intensive and is responsible of the consumption of a considerable part of the energy budget. Those mobile devices contain heterogeneous processing elements among-which we find Digital Signal Processors (DSP) and General Purpose Processors (GPP). In this context, the performance and energy estimation of those complex platforms is a difficult and time consuming task especially when considering both hardware and applicative parameters. In this paper, we propose a methodology for developing a unified high level video decoding performance and energy consumption analytical model for embedded heterogeneous platforms. This methodology is based on experimental measurements conducted on an embedded low-power platform. The developed model describes the performance and the energy consumption of H.264/AVC video decoding on both GPP and DSP in terms of video bit-rate, clock frequency and a set of comprehensive hardware and video related coefficients. It achieves a balance between a too abstract high level model and a detailed lower level one while guaranteeing a very good prediction properties (R-squared = 97%) for the tested videos. As a use case, we show that our model allows to accurately determine the bit-rate values for which video decoding on GPP is more energy-efficient than on DSP for a given platform.

A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applications

To meet the increasing complexity of mobile multimedia applications, SoCs equipping modern mobile devices integrate powerful heterogeneous processing elements among which Digital Signal Processors (DSP) and General Purpose Processors (GPP) are the most common ones. Due to the ever-growing gap between battery lifetime and hardware/software complexity in addition to applications computing power needs, the energy saving issue becomes crucial in the design of such architectures. In this context, we propose in this paper an end-to-end study of video decoding on both GPP and DSP. The study was achieved thanks to a two steps methodology: (1) a comprehensive characterization and evaluation of the performance and the energy consumption of video decoding, (2) an accurate high level energy model is extracted based on the characterization step.The characterization of the video decoding is based on an experimental methodology and was achieved on an embedded platform containing a GPP and a DSP. This step highlighted the importance of considering the end-to-end decoding flow when evaluating the energy efficiency of video decoding application. The measurements obtained in this step were used to build a comprehensive analytical energy model for video decoding on both GPP and DSP. Thanks to a sub-model decomposition, the developed model estimates the energy consumption in terms of processor clock frequency and video bit-rate in addition to a set of constant coefficients which are related to the video complexity, the operating system and the considered hardware architecture. The obtained model gave very accurate results (R2=97%) for both GPP and DSP energy consumption. Finally, based on the results emerged from the modeling methodology, we show how one can build rapidly a video decoding energy model for a given target architecture without executing the full characterization steps described in this paper.

Open-PEOPLE, A Collaborative Platform for Remote a Accurate Measurement and Evaluation of Embedded Systems Power Consumption

This paper presents Open-PEOPLE, a hardware and software platform which aims to widen access to accurate power consumption measurement to the scientific community. The idea behind this platform is to centralize and abstract the instrumentation effort and the investment cost then allow geographically remote users to make power measurement remotely without requiring any specific costly hardware and/or software.

GPP vs DSP: A Performance/Energy Characterization and Evaluation of Video Decoding

Mobile devices such as smart-phones and tablets are increasingly becoming the most important channel for delivering end-user Internet traffic especially multimedia content. One of the most popular use of these terminals is video streaming. In this type of application, video decoding is considered as the most compute and energy intensive part. Some specific processing units, such as dedicated Digital Signal Processors (DSPs), are added to those devices in order to optimize the performance and energy consumption. In this context, the objective of this paper is to give a comprehensive and comparative study of the performance and energy consumption of video decoding application on embedded heterogeneous platforms containing a GPP and a DSP. To achieve this goal, a performance and energy characterization methodology for H.264/AVC video decoding is proposed. This methodology considers a large set of video coding parameters and operating clock frequencies to reflect different execution scenarios ranging from low-quality video decoding on low-end mobile phones to high-quality video decoding on tablets. The obtained results revealed that the best performance-energy trade-off highly depends on the required video bit-rate and resolution. For instance, the GPP can be the best choice in many cases due to a significant overhead in DSP decoding which may represent 30% of the total decoding energy in some cases. Some explanations about the obtained performance and overheads are given. Finally, guidelines on which processing element to choose according to video properties are also proposed.

How to exploit the device diversity and database interaction to propose a generic cost model

Cost models have been following the life cycle of databases. In the first generation, they have been used by query optimizers, where the cost-based optimization paradigm has been developed and supported by most of important optimizers. The spectacular development of complex decision queries amplifies the interest of the physical design phase (PhD), where cost models are used to select the relevant optimization techniques such as indexes, materialized views, etc. Most of these cost models are usually developed for one storage device (usually disk) with a well identified storage model and ignore the interaction between the different components of databases: interaction between optimization techniques, interaction between queries, interaction between devices, etc. In this paper, we propose a generic cost model for the physical design that can be instantiated for each need. We contribute an ontology describing storage devices. Furthermore, we provide an instantiation of our meta model for two interdependent problems: query scheduling and buffer management. The evaluation results show the applicability of our model as well as its effectiveness.

iFogStor: An IoT Data Placement Strategy for Fog Infrastructure

Internet of Things (IoT) will be one of the driving application for digital data generation in the next years as more than 50 billions of objects will be connected by 2020. IoT data can be processed and used by different devices spread all over the network. The traditional way of centralizing data processing in the Cloud can hardly scale because it cannot satisfy many of the latency critical IoT applications. In addition, it generates a too high network traffic when the number of objects and services increase. Fog infrastructure provides a beginning of an answer to such an issue. In this paper, we present a data placement strategy for Fog infrastructures called iFogStor. The objective of iFogStor is to take profit of the heterogeneity and location of Fog nodes to reduce the overall latency of storing and retrieving data in a Fog. We formulated the data placement problem as a Generalized Assignment Problem (GAP) and proposed two ways to solve it: 1) an exact solution using integer programming and 2) a heuristic one based on geographical zoning to reduce the solving time. Both solutions proved very good performance as they reduced the latency by more than 86% as compared to a Cloud based solution and by 60% as compared to a naive Fog solution. Using geographical zoning heuristic can allow solving problems with large number of Fog nodes efficiently and in a couple of seconds making iFogStor feasible in runtime and scalable.

A Cost Model for Virtual Machine Storage in Cloud IaaS Context

This paper proposes a storage system cost model for Infrastructure as a Service (IaaS) Cloud. The proposed cost model takes into account the virtualization environment, the storage system characteristics in addition to energy and QoS related parameters (Service Level Agreement and penalties). We show that those parameters are relevant and allow us to predict an accurate estimation of the overall cost of the IaaS infrastructure. We validate this cost model against real measures and we show less than 10% of error in most cases. Designers and administrators can use this cost model to perform optimization, load balancing, configuration and pricing of the Cloud infrastructure.

On the energy efficiency of parallel multi-core vs hardware accelerated HD video decoding

Hardware video accelerators are used on mobile devices to provide support for energy efficient real time High definition (HD) video decoding. Recently, the rise of multi-core architectures on those devices increased their performances and make real time HD video decoding possible using parallel processing on the GPP cores only. What is even more interesting to know is the level of energy efficiency these kind of multi-core General Purpuse Processor (GPP) can achieve as compared to hardware video accelerators. In this paper, we propose an experimental evaluation of the energy efficiency of the two video decoding approaches. An accurate energy measurement was achieved on a recent low-power 40 nm mobile SoC containing a quad-core ARM processors and a video hardware accelerator. The results show that parallel multi-core HD decoding enhances both the performance and the energy efficiency as compared to the use of a single core. However, the hardware accelerated decoding is about three times more energy efficient. Based on the experimental observations, some challenges for enhancing parallel multi-core video decoding energy efficiency are pointed out.

Instruction Cache in Hard Real-Time Systems: Modeling and Integration in Scheduling Analysis Tools with AADL

Cache prediction for real-time systems in a preemptive scheduling context is still an open issue despite its practical importance. In this paper, we propose a modeling approach for taking into account the cache memory in realtime scheduling analysis. The goal is to have a simple but practical implementation to handle the cache memory with a real-time scheduling analyzer. The proposed contribution consists of three main parts: (1) modeling the targeted system with the Architecture Analysis and Design Language (AADL), (2) applying the cache analysis methods in a real time scheduling analysis tool and (3) performing scheduling simulation to access schedulability. For such a purpose, we present an extension of both the scheduling analysis tool Cheddar and of the AADL modeling language in order to integrate the cache modeling and analysis methodology we proposed. Experiments are presented to illustrate our propositions. They provide results on analysis that show examples of the timing impact of task preemption as well as the increase in overall responses time of the task set. This impact is important and the developed tool provides means to precisely assess it.

On benchmarking embedded Linux flash file systems

Due to its attractive characteristics in terms of performance, weight and power consumption, NAND flash memory became the main non volatile memory (NVM) in embedded systems. Those NVMs also present some specific characteristics/constraints: good but asymmetric I/O performance, limited lifetime, write/erase granularity asymmetry, etc. Those peculiarities are either managed in hardware for flash disks (SSDs, SD cards, USB sticks, etc.) or in software for raw embedded flash chips. When managed in software, flash algorithms and structures are implemented in a specific flash file system (FFS). In this paper, we present a performance study of the most widely used FFSs in embedded Linux: JFFS2, UBIFS, and YAFFS. We show some very particular behaviors and large performance disparities for tested FFS operations such as mounting, copying, and searching file trees, compression, etc.