James C. Erskine

Polycrystalline silicon thin-film transistors on a novel 800°C glass substrate

A new polycrystalline silicon thin-film transistor (TFT) technology using a potentially low-cost glass substrate is reported. Transistors are made using modified conventional n-channel MOS processes at temperatures of 800°C or less, with a final hydrogen implantation step. These transistors show leakage currents of 2 × 10-11A/µm of channel width, ON-to-OFF current ratios of 1 × 104at Vds= 9.0 V, and good dc stability. This combination of polycrystalline silicon transistors on potentially low-cost glass substrates offers a new option in the choice of active device technology for large-area flat-panel liquid crystal displays (LCDs).

A silicon-on-insulator circuit for high-temperature, high-voltage applications

The authors previously proposed the concept of a composite high-voltage device using series-connected low-voltage SOI (silicon-on-insulator) MOSFETs. In the present work, they demonstrate how the composite device can circumvent the fundamental materials limitations of bulk devices for high-voltage, high-temperature applications. Experimental circuits were fabricated on SIMOX (separation by implanted oxygen) substrates using an SOI NMOS process. For the purpose of demonstrations, external resistors were used as the bias elements. Individual transistor breakdown voltages were about 6-7 V, and did not vary significantly from 24 degrees C to 400 degrees C. The composite device characteristics closely resemble those of the individual MOSFETs. In particular, the breakdown voltage (typically 26-30 V) is nearly constant over the temperature range studied. Drain characteristics of a typical five-transistor composite device are shown for several stage temperatures.<<ETX>>

Characteristics of trench j-MOS power transistors

The fabrication of trench j-MOS transistors in bulk silicon, so that they can be operated in either a three-terminal or a four-terminal mode, is presented. When the transistors are operated in accumulation mode, the specific on-resistance is 0.8 m Omega -cm/sup 2/. In the four-terminal mode a high transconductance, 290 S/cm/sup 2/, is achieved by manipulating the inversion layer charge. In the three-terminal mode, mixed pentode-triode drain characteristics are exhibited. Response times are comparable to those of a junction FET. These properties make the trench j-MOS transistor attractive for power switching.<<ETX>>

Materials and Processes For Silicon TFT's On Aluminosilicate Glass: An Alternative Soi Technology

As-deposited polycrystalline silicon and argon ion laser recrystallized silicon thin film transistors (TFTs) have been fabricated on Corning Code 1729 glass substrates. This novel aluminosilicate glass has an expansion coefficient matched to that of silicon and a chemical durability comparable to that of fused silica. N-channel enhancement mode transistors were made using conventional IC device fabrication procedures (including thermal oxidation to form the gate insulator) modified to have a maximum processing temperature of 800 C. The- polycrystalline silicon TFTs exhibit leakage currents of less than 2x10 -11 A/ μm; of channel width and good stability and reproducibility. Transistors made in the recrystallized silicon show field effect electron mobilities as high as 270 cm 2 /V s, approximately 15 times the mobility of comparable devices made in as-deposited polycrystalline silicon. The recrystallized silicon devices also exhibit lower threshold voltages and lower leakage currents than do the comparable polycrystalline silicon devices. Major advantages of this TFT technology include the use of a novel, potentially low cost glass substrate and the simultaneous processing of both polycrystalline and recrystallized silicon devices on the same substrate material. This approach represents a new avenue for the incorporation of active devices into a variety of applications including integrated active matrix displays.