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James Norris Dieffenderfer

IBM

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Publication

Featured researches published by James Norris Dieffenderfer.

Archive | 1989

Ping-pong data buffer for transferring data from one data bus to another data bus

James Norris Dieffenderfer; Ronald Nick Kalla

Archive | 1996

System and method for tracing program execution within a processor before and after a triggering event

Victor Roberts Augsburg; Jeffrey Todd Bridges; Thomas K. Collopy; James Norris Dieffenderfer; Thomas Andrew Sartorius

Archive | 1997

Dynamic control of power management circuitry

James Norris Dieffenderfer; George Filip Diniz; Thomas Andrew Sartorius

Archive | 1997

System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities

Mark Michael Schaffer; James Norris Dieffenderfer; Edward Hammond Green; Juan Guillermo Revilla

Archive | 1994

System and method for program execution tracing within an integrated processor

Jeffrey Todd Bridges; Thomas K. Collopy; James Norris Dieffenderfer; Thomas Joseph Irene; Harry I. Linzer; Thomas Andrew Sartorius

Archive | 1999

System and method for tracing program instructions before and after a trace triggering event within a processor

Victor Roberts Augsburg; Jeffrey Todd Bridges; Thomas K. Collopy; James Norris Dieffenderfer; Thomas Andrew Sartorius

Archive | 2003

Method and system for providing cache set selection which is power optimized

Anthony Correale; James Norris Dieffenderfer; Robert L. Goldiez; Thomas Philip Speier; William Robert Reohr

Archive | 2004

Method for software controllable dynamically lockable cache line replacement system

James Norris Dieffenderfer; Richard W. Doing; Brian E. Frankel; Kenichi Tsuchiya

Archive | 2003

Random access memory having an adaptable latency

Francois Ibrahim Atallah; James Norris Dieffenderfer; Jeffrey Herbert Fischer; Michael T. Fragano; Daniel Geise; Jeffery H. Oppold; Michael R. Ouellette; Neelesh Govindaraya Pai; William Robert Reohr; Joel Abraham Silberman; Thomas Philip Speier

Archive | 2007

Apparatus and method for decreasing the latency between instruction cache and a pipeline processor

James Norris Dieffenderfer; Richard W. Doing; Brian Michael Stempel; Steven R. Testa; Kenichi Tsuchiya

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Thomas Andrew Sartorius

IBM

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Rodney Wayne Smith

IBM

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Thomas Philip Speier

IBM

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Jeffrey Todd Bridges

IBM

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Brian Michael Stempel

IBM

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Richard Gerard Hofmann

IBM

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Barry Joe Wolford

IBM

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Bernard Charles Drerup

IBM

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Victor Roberts Augsburg

IBM

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Jaya Prakash Subramaniam Ganasan

IBM

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