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Dive into the research topics where James P. Baukus is active.

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Featured researches published by James P. Baukus.


design automation conference | 2014

Circuit Camouflage Integration for Hardware IP Protection

Ronald P. Cocchi; James P. Baukus; Lap Wai Chow; Bryan J. Wang

Circuit camouflage technologies can be integrated into standard logic cell developments using traditional CAD tools. Camouflaged logic cells are integrated into a typical design flow using standard front end and back end models. Camouflaged logic cells obfuscate a circuits function by introducing subtle cell design changes at the GDS level. The logic function of a camouflaged logic cell is extremely difficult to determine through silicon imaging analysis preventing netlist extraction, clones and counterfeits. The application of circuit camouflage as part of a customers design flow can protect hardware IP from reverse engineering. Camouflage fill techniques further inhibit Trojan circuit insertion by completely filling the design with realistic circuitry that does not affect the primary design function. All unused silicon appears to be functional circuitry, so an attacker cannot find space to insert a Trojan circuit. The integration of circuit camouflage techniques is compatible with standard chip design flows and EDA tools, and ICs using such techniques have been successfully employed in high-attack commercial and government segments. Protected under issued and pending patents.


Journal of Applied Physics | 1988

Photoluminescence of HgTe‐CdTe superlattices: Comparison of theory and experiment

James P. Baukus; Andrew T. Hunter; J. N. Schulman; J. P. Faurie

Infrared photoluminescence measurements have been made of a number of HgTe‐CdTe superlattice samples as a function of temperature from liquid He to room temperature. The experimental results are compared with calculations of the band gap of these materials and the effects of layer thicknesses, valence‐band offset, effective mass, and Hg in the CdTe layers are investigated. The data are in reasonable agreement with the calculations for zero (or small) valence‐band offset and no Hg in the CdTe layers.


Journal of Crystal Growth | 1989

MBE growth and characterization of Hg-based superlattices

Owen K. Wu; Fred A. Shirland; James P. Baukus; J. N. Schulman; G.Sanjiv Kamath; E.A. Patten

Abstract MBE growth of HgTe/HgCdTe superlattices are of great interest because of their potential applications in infrared detectors and fiber optic communication devices. In this paper, we report on the MBE growth of high quality HgTe/HgCdTe superlattices and the results obtained from structural and optical characterization. Observation of heavy and light hole interband transitions is discussed and related to the valence band offset.


Archive | 1998

Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering

James P. Baukus; Lap-Wai Chow; William M.Jr. Clark


Archive | 1998

Secure integrated circuit

James P. Baukus; William M. Clark; Lap-Wai Chow; Allan R. Kramer


Archive | 1994

Integrated circuit security system and method with implanted interconnections

James P. Baukus; William M. Clark; Lap-Wai Chow; Allan R. Kramer


Archive | 2001

Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide

Lap-Wai Chow; James P. Baukus; William M. Clark


Archive | 2010

Building block for a secure CMOS logic cell library

Ronald P. Cocchi; James P. Baukus; Bryan J. Wang; Lap Wai Chow; Paul Ouyang


Archive | 2009

Camouflaging a standard cell based integrated circuit

Lap Wai Chow; James P. Baukus; Bryan J. Wang; Ronald P. Cocchi


Archive | 1999

METHOD AND APPARATUS USING SILICIDE LAYER FOR PROTECTING INTEGRATED CIRCUITS FROM REVERSE ENGINEERING

James P. Baukus; Lap-Wai Chow; William M. Clark

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