James R. Bitner

Efficient generation of the binary reflected gray code and its applications

Algorithms are presented to generate the n-bit binary reflected Gray code and codewords of fixed weight in that code. Both algorithms are efficient in that the time required to generate the next element from the current one is constant. Applications to the generation of the combinations of n things taken k at a time, the compositions of integers, and the permutations of a multiset are discussed.

Probabilistic verification of Boolean functions

We present a novel method for verifying the equivalence of two Boolean functions. Each function is hashed to an integer code by assigning random integer values to the input variables and evaluating an integer-valued transformation of the original function. The hash codes for two equivalent functions are always equal. Thus the equivalence of two functions can be verified with a very low probability of error, which arises from unlikely “collisions” between inequivalent functions. An upper bound, ∈, on the probability of error is known a priori. The bound can be decreased exponentially by making multiple runs. Results indicate significant time and space advantages for this method over techniques that represent each function as a single OBDD. Some functions known to require space (and time) exponential in the number of input variables for these techniques require only polynomial resources using our method. Experimental results indicate that probabilistic verification can provide an attractive alternative for verifying functions too large to be handled using these OBDD-based techniques.

Probabilistic design verification

The authors present a novel method for verifying the equivalence of two Boolean functions. Each function is hashed to an integer code by assigning random integer values to the input variables and evaluating its integer-valued representation. The equivalence of two functions can be verified with a very low probability of error. The probability of error can be exponentially decreased by making multiple runs. Results indicate significant time and space advantages for this method over deterministic techniques. Some functions known to require space (and time) exponential in the number of input variables for deterministic verification require only polynomial resources using the proposed technique.<<ETX>>

Indexed BDDs: algorithmic advances in techniques to represent and verify Boolean functions

A new Boolean function representation scheme, the Indexed Binary Decision Diagram (IBDD), is proposed to provide a compact representation for functions whose Ordered Binary Decision Diagram (OBDD) representation is intractably large. We explain properties of IBDDs and present algorithms for constructing IBDDs from a given circuit. Practical and effective algorithms for satisfiability testing and equivalence checking of IBDDs, as well as their implementation results, are also presented. The results show that many functions, such as multipliers and the hidden-weighted-bit function, whose analysis is intractable using OBDDs, can be efficiently accomplished using IBDDs. We report efficient verification of Booth multipliers, as well as a practical strategy for polynomial time verification of some classes of unsigned array multipliers.

IBDDs: an efficient functional representation for digital circuits

A central issue in the solution of many computer aided design problems is finding a concise representation for circuit designs and their functional specifications. Ordered binary decision diagrams (OBDDs) have recently emerged as a popular representation for various CAD applications such as design verification, synthesis, testing, modeling and simulation. Unfortunately, there is no efficient OBDD representation for many circuits, even in some cases for circuits which perform such apparently simple functions as multiplication. The authors present a new BDD representation scheme, called indexed BDDs (IBDDs), and show that it allows polynomial representations of functions which provably require exponential space using OBDDs. The key idea in IBDDs is to allow multiple occurrences of the input variables, subject to ordering constraints. The authors give an algorithm for verifying the equivalence of two IBDDs and a heuristic for constructing IBDDs for arbitrary combinational circuits.<<ETX>>

Efficient variable ordering and partial representation algorithm

In this paper we introduce some new methods for constructing Ordered Partial Decision Diagrams (OPDDs), The algorithms are effective in capturing a significant fraction of a given functions truth table using only a very small space. Using such data structures the importance of a variable in a Boolean function can be computed. Such methods can easily be used for computing effective variable orders to construct BDDs. The measures of a variables importance are based on information-theoretic criteria, and require computation of the entropy of a variable for a given function. We have found that entropy measures can be quite efficient in distinguishing the importance of variables, and at times provide very effective variable order. The results show an encouraging approach towards the understanding and the solution of this well known problem.

Efficient algorithmic circuit verification using indexed BDDs

The Indexed Binary Decision Diagram (IBDD), a Boolean function representation scheme, provides a compact representation for functions whose OBDD representation is intractably large. In this paper, we present more efficient algorithms for satisfiability testing and equivalence checking of IBDDs. Efficient verification of Booth multipliers, as well as practical strategies for polynomial time verification of some classes of unsigned array multipliers, are demonstrated experimentally. Our results show that the verification of many instances of functions whose analysis is intractable using OBDDs, such as multipliers and the hidden-weighted-bit function, can be done efficiently using IBDDs.<<ETX>>

Efficient Verification Of Multiplier And Other Difficult Functions Using IBDDs

It is well known that any OBDD representing a multiplier (or some other difficult Boolean functions) requires exponential space. Alternate representation schemes have been suggested for multipliers. However, such representations have difficulties in capturing even some simple modifications in a multiplier circuit. We show how Indexed BDDs (IBDDs), a generally applicable representation scheme, allow efficient descriptions of a multiplier from a circuit represeiitat,ion or an abstract specification. An algorithm to detect inequivalence between two arbitrary IBDD multiplier graphs is also given. We also discuss how to verify other difficult functions by augmenting the IBDD representation scheme with functional partitioning.

The selection of optimal tab settings

A new generation of computer terminals allows tab settings to be selected and set by the computer. This feature can be used to reduce the number of characters that are needed to represent a document for transmission and printing. In this note, an algorithm is given for selecting the optimal set of tab stops for minimizing the number of characters transmitted. An implementation of the algorithm has reduced the number of characters transmitted by from 7 to 30 percent, but requires a prepass through the document to compute a matrix used in determining the optimal set of tab stops. The use of fixed tab stops, as a heuristic alternative, can achieve about 80 percent of optimal with no prepass.

Storing Matrices on Disk for Efficient Row and Column Retrieval

Abstract We study the problem of storing a matrix on disk where the cost for retrieving a row or column is the number of different pages containing elements of that row or column and the cost of a matrix is the sum of the cost for retrieving each row and column. We give a non-obvious, nontrivial lower bound on the cost and one algorithm that asymptotically achieves this bound if the page size is in a given set of integers, and another that achieves it if not.