James Simon Cho

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Featured researches published by James Simon Cho.

international solid-state circuits conference | 2007

Paul Petrus; Qinfang Sun; Sam Ng; James Simon Cho; Ning Zhang; Don Breslin; Matthew D. Smith; Bill McFarland; Sundar G. Sankaran; John Thomson; Rich Mosko; Augusta Chen; Tuofu Lu; Yi-Hsiu Wang; Xioaru Zhang; Dave Nakahira; Yixiang Li; Ravi Subramanian; Arun Venkataraman; Prem Kumar; Sudhakar Swaminathan; Jeffrey M. Gilbert; Won-Joon Choi; Huanchun Ye

A 3 times 3 MIMO baseband and MAC processor in 0.18 mum 6M CMOS occupies 62.1 mm2 and dissipates (Tx/Rx) 1379/1200mW at 1.8V including ADCs, DACs, and PCI/PCIe PHY. The integrated BB and MAC delivers up to 300Mb/s in 40MHz bandwidth, greater than 150Mb/s TCP throughput best case and a maximum range of 700ft range.

international solid-state circuits conference | 2005

William J. McFarland; Won-Joon Choi; Ardavan Maleki Tehrani; Jeffrey M. Gilbert; J.S. Kuskin; James Simon Cho; Jeffrey L. Smith; Praveen Dua; Don Breslin; Samuel Ng; Xiaoru Zhang; Yi-Hsiu Wang; John Thomson; M. Unnikrishnan; M. Mack; Suni Mendis; Ravi Subramanian; Paul J. Husted; Patrick S. Hanley; Ning Zhang

A WLAN SoC for video applications handles IEEE 802.11a/b/g and supports PHY data rates to 108 Mbit/s. The SoC implements two chain maximum ratio combining and beamforming. Video features include a jitter removal system and MPEG-TS packet aggregation. Measured results on the 7.2mm/spl times/7.2mm IC using a 0.18 /spl mu/m CMOS process demonstrate throughput improvements in both RX and TX.

Archive | 2012