James T. Cain

Symbolic computation of robot manipulator kinematics

A software package has been developed to solve, symbolically, the direct and inverse kinematics of an n-degree-of-freedom manipulator. As an input, SRAST (symbolic robot arm solution tool) expects the corresponding parameters described by Denavit and Hartenberg (1955). As an output it generates (in closed form) the direct- and inverse-kinematics solutions. When solving the inverse kinematics it is capable of excluding solutions with the n, o, and a vectors, dealing with redundant manipulators, and documenting how the solutions were found. SRAST implements its own symbolic processor and makes use of artificial intelligence techniques. To solve the inverse kinematics, eleven trigonometric rules are heuristically applied to identify a mathematical set of solutions. SRAST has successfully solved a number of industrial manipulators. At present it is the only software package capable of generating the inverse kinematics in symbolic form.<<ETX>>

An automated, reconfigurable, low-power RFID tag

This paper describes an ultra low power active RFID tag and its automated design flow. RFID primitives to be supported by the tag are enumerated with RFID macros and the behavior of each primitive is specified using ANSI-C within the template to automatically generate the tag controller. Two power saving components, a passive transceiver/burst switch and a smart buffer, are presented to save power and increase tag lifetime. Based on a test program, the processors required 183, 43, and 19 muJ per transaction for StrongARM, XScale, and EISC processors, respectively. Three hardware controllers using a Fusion FPGA, Coolrunner II CPLD, and ASIC required 13 nJ, 1.3 nJ, and 0.07 nJ per transaction

A Field Programmable RFID Tag and Associated Design Flow

Current radio frequency identification (RFID) systems generally have long design times and low tolerance to changes in specification. This paper describes a field programmable, low-power active RFID tag, and its associated specification and automated design flow. RFID primitives to be supported by the tag are enumerated with RFID macros, or assembly-like descriptions of the tag operations. From these, the RFID preprocessor generates templates automatically. The behavior of each RFID primitive is specified using ANSI C in the template. The resulting file is compiled by the RFID compiler. A smart buffer sits between the transceiver and the tag controller, to detect whether incoming packets are intended for the tag. By doing so, the main controller may remain powered down to reduce power consumption. Two system-on-a-chip implementation strategies are presented. First, a microprocessor based system for which a C program is automatically generated. The second includes a block of low-power FPGA logic. The user supplied RFID logic in ANSI-C is automatically converted into combinational VHDL by the RFID compiler. Based on a test program, the processors required 183, 43, and 19 muJ per transaction for StrongARM, XScale, and EISC processors, respectively. By replacing the processor with a Coolrunner II, the controller can be reduced to 1.11 nJ per transaction

The In-Situ Technique for Measuring Input Impedance and Connection Effects of RFID Tag Antenna

In this paper, an indirect noninvasive method for measuring input impedance and the variations in the assembly of the interconnect and packaging between antenna and the integrated circuit (IC) effects of passive radio frequency identification (RFID) transponder (tags) antennas is presented. The analysis of different RFID tags is presented together with the experimental data.

Radio frequency identification prototyping

While RFID is starting to become a ubiquitious technology, the variation between different RFID systems still remains high. This paper presents several prototyping environments for different components of radio frequency identification (RFID) tags to demonstrate how many of these components can be standardized for many different purposes. We include two active tag prototypes, one based on a microprocessor and the second based on custom hardware. To program these devices we present a design automation flow that allows RFID transactions to be described in terms of primitives with behavior written in ANSI C code. To save power with active RFID devices we describe a passive transceiver switch called the “burst switch” and demonstrate how this can be used in a system with a microprocessor or custom hardware controller. Finally, we present a full RFID system prototyping environment based on real-time spectrum analysis technology currently deployed at the University of Pittsburgh RFID Center of Excellence. Using our prototyping techniques we show how transactions from multiple standards can be combined and targeted to several microprocessors include the Microchip PIC, Intel StrongARM and XScale, and AD Chips EISC as well as several hardware targets including the Altera Apex, Actel Fusion, Xilinx Coolrunner II, Spartan 3 and Virtex 2, and cell-based ASICs.

Analytic modelling methodology for analysis of energy consumption for ISO 18000-7 RFID networks

Active Radio Frequency Identification (RFID) networks consist of battery powered RFID tags. These tags have a lifetime limited by the on-board battery. Energy consumption of such a network is a critical metric. Future RFID networks are projected to continue to increase in size, eventually containing thousands or millions of nodes. Current simulation methods require evaluation of all entities resulting in extremely long execution time for large networks such as RFID networks. Simulations are a useful tool for designers to select the best design alternative for a given network. This paper presents a general framework and method that reduces the order of a given network providing a relatively simple tractable model. The energy consumption of this reduced order network can then be found quickly and efficiently. This order reduction method allows the designer to quickly analyse the design space and selects the best alternative for the network in question.

Microprocessors and Education [Guest editor's inroduction]

The papers for this special issue of Computer were selected to be representative of those presented at the DISE Workshop on Microprocessors and Education held at Colorado State University, August 16-18, 1976. The workshop was sponsored by the DISE Committee (Digital Systems Education Committee–a project supported by the National Science Foundation) along with the Department of Electrical Engineering and Computer Science of Colorado State University. The workshop was intended to provide a forum both for the academic and industrial communities. For educators it was an opportunity to exchange ideas on how microporcessors should be integrated into the curriculum and to discuss microprocessor hardware, software, and system problems associated with the educational environment. For industry it was a chance to present its views on what skills will be required of graduating engineers, to provide an insight into the problems and design decisions encountered in designing and fabricating devices and systems, and to provide educators with a forecast of future developments in the industry.

Automated Test System for ISO 18000-7 - Active RFID

When testing a system for compliance to a standard or interoperability with other systems compliant with a standard, the quality and repeatability of the testing methods is critical. This is especially true when the results are used to make a purchasing decision. The ideal test procedure will expose every device that is tested to the exact same stimuli, record the same measurements and evaluate those measurements using the same method. To this end the University of Pittsburgh RFID Center of Excellence has developed an automated test suite for testing compliance to and interoperability under ISO 18000-7, a leading active RFID standard. This automated system provides consistent input stimuli to all device and ensures that all results are calculated using the same method.

Exploring RFID Prototyping in the Virtual Laboratory

This paper describes several RFID technology related course topics dealing with antenna design, protocol design, and implementation strategies accessed from a centralized system for students to access. By utilizing the central system, students from multiple universities can share a single piece of equipment and still learn about the underlying RFID technology. Additionally, by creating this interface system, the necessary features for RFID development can be made available to students and instructors need not learn every single detail of complicated equipment to effectively teach students to work with RFID technology

A design automation and power estimation flow for RFID systems

While RFID has become a ubiquitous technology, there is still a need for RFID systems with different capabilities, protocols, and features depending on the application. This article describes a design automation flow and power estimation technique for fast implementation and design feedback of new RFID systems. Physical layer features are described using waveform features, which are used to automatically generate physical layer encoding and decoding hardware blocks. RFID primitives to be supported by the tag are enumerated with RFID macros and the behavior of each primitive is specified using ANSI-C within the template to automatically generate the tag controller. Case studies implementing widely used standards such as ISO 18000 Part 7 and ISO 18000 Part 6C using this automation technique are presented. The power macromodeling flow demonstrated here is shown to be within 5% to 10% accuracy, while providing results 100 times faster than traditional methods. When eliminating the need for certain features of ISO 18000 Part 6C, the design flow shows that the power required by the implementation is reduced by nearly 50%.