James T. Kajiya
Microsoft
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Publication
Featured researches published by James T. Kajiya.
international conference on computer graphics and interactive techniques | 1996
Jay Torborg; James T. Kajiya
A new 3D graphics and multimedia hardware architecture, cod named Talisman, is described which exploits both spatial and temporal coherence to reduce the cost of high quality animatio Individually animated objects are rendered into independent image layers which are composited together at video refresh ra to create the final display. During the compositing process, a fu affine transformation is applied to the layers to allow translatio rotation, scaling and skew to be used to simulate 3D motion of objects, thus providing a multiplier on 3D rendering performan and exploiting temporal image coherence. Image compression broadly exploited for textures and image layers to reduce imag capacity and bandwidth requirements. Performance rivaling hi end 3D graphics workstations can be achieved at a cost point two to three hundred dollars.
siggraph eurographics conference on graphics hardware | 2005
Turner Whitted; James T. Kajiya
The growing application of user-defined programs within graphics processing units (GPUs) has transformed the fixed-function display pipeline into a largely programmable pipeline. In this paper we propose that the elements fed through the pipeline be made entirely procedural. To enable this, we present a modification of the conventional graphics processor in which all procedures are executed in a common processor array and the rasterizer is augmented with a more general sampling controller. By executing both the geometric and shading elements of a procedural graphics model in a single processor we retain the data amplification that distinguishes procedural descriptions without a corresponding explosion of external bandwidth.
high performance graphics | 2009
Turner Whitted; James T. Kajiya; Erik Ruf; Ray A. Bittner
A low-level graphics processor is assembled from a collection of hardwired functions of screen coordinates embedded directly in the display. Configuration of these functions is controlled by a buffer containing parameters delivered to the processor on-the-fly during display scan. The processor is modular and scalable in keeping with the demands of large, high resolution displays.
Archive | 1998
John Snyder; James T. Kajiya; Steven A. Gabriel; Michael A. Toelle
Archive | 2004
Michael J. Sinclair; Ken Hinckley; James T. Kajiya; Nathan C. Sherman
Archive | 1996
Nathan P. Myhrvold; James T. Kajiya; Jerome E. Lengyel; Russell Schick
Archive | 1996
James T. Kajiya; John G. Torborg; Michael A. Toelle; Kent E. Griffin; Mark L. Kenworthy; John Snyder; Conal Elliott
Archive | 1996
James T. Kajiya; John Snyder
Archive | 1996
James T. Kajiya; Steven A. Gabriel; William Chambers Powell
Archive | 1997
Jerome E. Lengyel; John Snyder; James T. Kajiya