Jan Theodoor Jozef Bosiers

A Backside-Illuminated Image Sensor With 200 000 Pixels Operating at 250 000 Frames per Second

In this paper, a high-speed image sensor with very high sensitivity is developed. The high sensitivity is achieved by introduction of backside illumination and charge-carrier multiplication (CCM). The high frame rate is guaranteed by installing the in situ storage image sensor (ISIS) structure on the front side. A test sensor of the BSI-ISIS has been developed and evaluated. It is shown that an image with a very low signal level embedded under the noise floor is recognizable by activating the CCM.

A 16 Mfps 165kpixel backside-illuminated CCD

In 2002, we reported a CCD image sensor with 260×312 pixels capable of capturing 103 consecutive images at 1,000,000 frames per second (1Mfps) [1]. We named the sensor “ISIS-V2”, for In-situStorage Image Sensor Version 2. 103 memory elements are attached to every pixel; generated image signals were instantly and continuously stored in the in-situstorage without being read out of the sensor. The ultimate high-speed recording was enabled by this parallel recording at all pixels. In 2006, the color version, ISIS-V4, was reported [2]. In 2009, we developed ISIS-V12, a backside-illuminated image sensor mounting the ISIS structure and the CCM, charge-carrier multiplication, on the front side [3]. The CCM is a CCD-specific efficient signal-amplification device. CCM, combined with the BSI structure and cooling, achieved very high sensitivity. The ISIS-V12 was a test sensor intended to prove the technical feasibility of the structure. The maximum frame rate was 250kfps for a charge-handling capacity of Qmax=10,000e− and 1Mfps for a reduced Qmax. The pixel count was 489×400 pixels. For backside-illuminated (BSI) image sensors, metal wires can be placed on the front surface to increase the frame rate without reducing fill factor or violating uniformity of the pixel configuration. It has been proved by simulations that 100Mfps is achievable by introducing innovative technologies including a special wiring method [4]. We now report on ISIS-V16, developed by incorporating technologies to increase the frame rate with those to achieve very high sensitivity, which was confirmed by evaluation of ISIS-V12. The performance specification of ISIS-V16 is summarized in Fig. 23.4.1.

Very Low Dark Current CCD Image Sensor

Very low dark current in charge-coupled-device image sensors is established by means of multipinned phase combined with vertical antiblooming, so-called all-gates pinning. Hereby, dark-current generation at the surface and diffusion from the bulk are suppressed. Using a conventional 6 times 6 mum2 image pixel with an additional n-type implant, a dark-current level of 1.5 pA/cm2 is obtained at 60degC without loss of optical performance. This means that the pixel dark current is reduced by a factor 80.

Sensitivity improvement in progressive-scan FT-CCDs for digital still camera applications

Sensitivity improvements in a 3.2 M-pixel CCD image sensor developed for digital still camera applications are presented. The introduction of gap-less microlenses increases the sensitivity with 25-30% while the high angular response is maintained. With the binning possibility at the image-storage transition, the sensitivity in monitor mode can be increased. Finally the sensor output amplifier now combines low noise and excellent linearity with a much higher conversion factor. This improvement is obtained by reduced parasitic capacitances around the Floating Diffusion area.

A 28 mega pixel large area full frame CCD with 2/spl times/2 on-chip RGB charge-binning for professional digital still imaging

CCD imagers for professional digital still cameras (DSCs) require in general high resolution. However for some applications, high sensitivity and high speed are more important and can be exchanged for resolution. A concept is presented in which the resolution of the imager will be decreased in binning mode while the sensitivity and frame rates are increased. For color CCDs, the RGB Bayer color filter pattern should be preserved after charge binning without discarding charge. The first results of this new concept are presented

F4: High-speed image sensor technologies

High speed imaging is one of the fastest growing semiconductor markets. Growth is currently driven by consumer and industrial applications such as HD video, slow motion play-back, machine vision, 3D range capture, and robotics. This forum will present chip architectures, circuits, and system-level solutions used in CCD and CMOS image sensors for high speed cameras. Technology topics include photon detection devices, pixel circuits and array readout circuits, A/D converters, image processing and interface circuits presented by world leading experts from industry and academia. The potential applications of this technology will be demonstrated by ultra high speed capture solutions for 3D range imaging and robotics. For advanced applications, techniques for outputing high-throughput pixel data using analog or digital interfaces are described. The forum will conclude with a panel discussion where the attendees have the opportunity to ask questions and to share their views, and this all-day forum encourages open information exchange. The targeted participants are circuit designers and concept engineers working on image sensor and camera system design.

IDEAL: An image pre-processing architecture for high-end professional DSC applications

We developed and implemented a flexible image pre-processing concept to achieve an image sub-system for top-end professional digital still camera applications that ensures the highest possible image quality. It supports high-speed multiple-image acquisition and data processing for very-large resolution images, it reduces the design-in time for the customers and it can be implemented economically for high-end applications with relatively smaller volumes.

A 36×48mm 2 48M-pixel CCD imager for professional DSC applications

A 48 M-pixel, 6 k times 8 k, 36 times 48 mm2 full-frame CCD imager was developed for professional digital SLR cameras and digital camera backs. Compared to the previous generation CCD, the pixel area was reduced by 30% from 7.2times7.2 mum2 to 6.0 times 6.0 mum2 to meet the demands for higher resolution. Still, by improvements in technology and design, the SNR under identical exposure conditions was increased by 30%.

Session 23 overview / IMMD: Image sensors

Summary form only given. Higher speeds, increased dynamic range and improved performance for small pixels are clearly driving the imaging industry. This session introduces several interesting new approaches, based on combinations of imager design, technology and architecture, to achieve better performance on these competitive imaging aspects.

Evaluation of a backside-illuminated ISIS

This paper presents preliminary evaluation results of a test sensor of the backside-illuminated ISIS, an ultra-high sensitivity and ultra-high speed CCD image sensor. To achieve ultra-high sensitivity, the CCD image sensor employs the following three technologies: backside illumination, cooling and Charge Carrier Multiplication (CCM). The test sensor has been designed, fabricated and evaluated. At room temperature without cooling, the video camera has about ten-time higher sensitivity than the previous one, which was supported by a conventional front side illumination technology. Furthermore, the video camera can detect images at very low signal level, less than 5 e-, by using CCM at -40 degree C.