Jarmo Tapani Arponen

A 112Mb/s full duplex remotely-powered impulse-UWB RFID transceiver for wireless NV-memory applications

A dual band symmetrical RFID transceiver for high capacity wireless NV-memory applications is reported. The circuit exhibits a FOM of 58pJ/b and 48pJ/b in Tx and Rx respectively, with a 112Mb/s data rate capability. It operates in the 7.9GHz UWB frequency band for full duplex communication and is remotely powered thru a UHF CW. The circuit is fabricated in a 0.13µm 1.2V CMOS process.

A 112 Mb/s Full Duplex Remotely-Powered Impulse-UWB RFID Transceiver for Wireless NV-Memory Applications

A dual band symmetrical UWB-RFID transceiver for high capacity wireless NV-Memory applications is reported. The circuit exhibits a figure of merit of 58 pJ/b and 48 pJ/b in Tx and Rx respectively, with a 112.5 Mb/s data rate capability. It operates in the 7.9 GHz UWB frequency band for full duplex communication and is remotely powered through a UHF CW signal. The circuit has been implemented in a 0.13 μm 1.2 V CMOS process.

A New Symmetric Transceiver Architecture for Pulsed Short-Range Communication

This paper proposes a novel symmetric super- regenerative transceiver architecture for pulsed short-range communication. The proposed architecture is targeted for wireless applications where ultra low power consumption and data-rate in tens of megabits per second are needed over distances in the range of tens of centimeters. The transmitter and receiver are both based on super-regenerative principle and both functions in the transceiver utilize one mutual super-regenerative oscillator. Additionally, the transceiver architecture allows fast synchronization of transceivers thanks to the delayed reflection phenomenon which makes it possible to detect correct timing simultaneously at both ends of the system. Measurement results demonstrate the feasibility of the proposed principle.

Dual-Interface Memory for RF Memory Tag Systems

In the simplest form the RF memory tag system consists of a stand-alone memory tag with a large non-volatile storage memory (capacity in gigabits), and a reader/writer device. The reader/writer device powers the tag wirelessly during data-transfer. An RF memory tag can be also embedded into an electronic device providing wireless access to storage memory even when the device is without a battery or the battery is empty. This enables totally new applications but set also new requirements for the memory devices. In this paper we analyze the requirements and propose dual-interface memory architecture for the RF memory tag systems.