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Dive into the research topics where Jayesh Shah is active.

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Featured researches published by Jayesh Shah.


electronic components and technology conference | 2004

Investigation of different options of pre-applied CSP underfill for mechanical reliability enhancements in mobile phones

Nael Hannan; Arni Kujala; Vinod Mohan; Paul Morganelli; Jayesh Shah

This paper explores an alternate process for the application of underfill. The ideal process for an efficient SMT line is to apply the underfill to the package prior to shipping, thus moving all underfill handling and processing steps to the package manufacturer. The process creates a component that can be loaded into tape and reel and handled as any other surface mount part. Standard pick-and-place equipment can then be used to pick the component and place it on the PWB. The underfill cures during reflow, and may be reworkable. This process is called pre-applied chip scale package underfill and must handle the moisture coming off the PWB during reflow to create a near void-free underfill layer, minimizing any potential for solder bridging. The current investigation provides results of a study aimed at enhancing mechanical shock reliability. Reliability results of four different pre-applied underfill options are presented and development and qualification of a pre-applied CSP underfill process is described. Issues surrounding development of effective materials, processes and equipment for reinforcing board-mounted CSPs in a high volume production environment are also discussed in this paper.


electronic components and technology conference | 2005

Partial pre-applied underfill for assembly and reliability of Pb-free CSPs

Paul Morganelli; Jayesh Shah; Brian Wheelock; Vinod Mohan; Matthew Laffey

A novel pre-applied underfill is presented. In this approach, a B-staged thermoset is applied to a chip-scale package (CSP) as a thin layer over the solder bump array. During reflow, the coating expands to fill the standoff gap between the PCB and package, providing reinforcement to the solder joints. The underfill material is stable at typical drying and burn-in conditions, allowing it to be applied early in the manufacturing process. The expanded underfill was found to improve drop impact resistance significantly relative to a non-underfilled CSP.


international conference on polymers and adhesives in microelectronics and photonics | 2005

Low temperature snap cure thermoset adhesives with good worklife

Stijn Gillissen; E. Nelis; G. van Wuytswinkel; M. de Pater; Chih-Min Cheng; V. Buffa; W. O'Hara; Bo Xia; Jayesh Shah

A break-through adhesive chemistry has been developed that achieves cure in seconds at temperatures below 110°C. These adhesives enable low cost RFID tag construction with low temperature substrates at extremely high assembly speed. Assemblies that require electrically conductive or non-conductive adhesives can benefit from this innovation. The cure speed of isotropic conductive paste (ICP) adhesive is demonstrated by measuring dynamic conductivity development during the heating process. Rheological stability at room temperature persists for days. The impact of rheological behavior on high speed processing is discussed. Silver ink based antenna and simulated die strap are used as test vehicles for processing and reliability tests. The integrity of the assembly is shown using a mandrel bend test to simulate downstream processing such as converting and printing. Together with a proprietary thermal radiation cure method, assembly speeds up to 300 feet/minute are achievable. The electrical stability of these bend-tested tags were evaluated in air to air thermal shock (-40°C to 80°C) and 85°C/85%RH conditions and found to be stable. The reliability results are presented and the challenge of high speed reel-to-reel processing are also discussed based on an isotropic conductive adhesive approach. This paper discusses these results and presents an adhesive technology that enables low cost RFID tag assembly.


electronic components and technology conference | 2002

A novel no-flow flux underfill material for advanced flip chip packaging

Allison Y. Xiao; Quinn K. Tong; Jayesh Shah; Paul Morganelli

A novel no-flow underfill material for advanced flip chip and CSP packaging has been successfully developed. This new material is based on a non-anhydride resin system and therefore it does not have the chemical sensitizing concern. Unlike the short pot life of most anhydride systems this new material exhibited excellent pot life. The viscosity of the material did not increase over 48 hours at room temperature. During the assembly process, the material demonstrated that it fluxed the solder bumps, formed a nice fillet, and was fully cured during a single reflow exposure. Production efficiency is therefore significantly increased. In addition, the assembled packages using this novel no-flow underfill material also achieved high interconnect yield. In this paper, we present the curing kinetics study and material properties of this novel no-flow material. The influence of fluxing agents on curing kinetics of this system is discussed. Material properties such as glass transition temperature (Tg), modulus, and viscosity were systematically characterized. Differential scanning calorimetry (DSC) dynamic-mechanical analysis (DMA), and rheometry were used for this study. In addition, promising assembly trial results, using small flip chips (PB8) and CSPs (TV46), are reported. Finally, the effects of the formulations and reflow profile on voiding and yield are also discussed.


electronic components and technology conference | 2003

Materials characterization and requirements of package applied underfill

Jayesh Shah; Paul Morganelli; Brian Wheelock

As CSP attachment becomes a more prevalent method of IC packaging, new classes of materials are being developed to simplify the process of mounting and underfilling the components. Specifically, materials that can he pre-applied on the CSP package provide attractive alternatives to the currently used capillary and no- flow underfill technology. The package-applied underfill approach provides a seamless tramition to the typical SMT process eliminating all additional steps of the underfilling operation. In general, package-applied underfill offers substantial value to manufacturers. This paper will focus on a new material that meets the process and property requirements of the pre-applied underfill application. The paper will discuss all the key material properties to encompass the multiple steps involved from its application on the package level to its functionality at the board level. The paper will present a materials curing kinetics study by DSC, determination of fluxing capabilities, rheology, and adhesion characterization for a new B-stageable underfill. Additionally the materials stability and its properties and function on the package will be discussed


Archive | 2004

Method of using pre-applied underfill encapsulant

Paul Morganelli; Jayesh Shah; David Peard


Archive | 2003

No-flow underfill encapsulant

Paul Morganelli; Anthony DeBarros; Brian Wheelock; Jayesh Shah


Archive | 2002

Toughened epoxy-anhydride no-flow underfill encapsulant

Jayesh Shah


Archive | 2003

No flow underfill composition

Yue Xiao; Quinn K. Tong; Paul Morganelli; Jayesh Shah


Archive | 2008

Corrosion-Preventive Adhesive Compositions

Jayesh Shah; Bo Xia; Chih-Min Cheng

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