Jean-Baptiste Jacob

Design, modelling and implementation of the ATMOS project fibre delay line photonic switching matrix

This paper presents the fibre delay line switching matrix, a high-performance photonic system consisting of an electrically controlled optical high-speed transport network. This photonic matrix adopts the asynchronous transfer mode (ATM) technique and an internal self-routing architecture based on wavelength encoding, for cell routing and multiplexing. A set of output queues provides the buffering function.An extensive performance evaluation is presented, with reference to both the traffic throughput and technology feasibility. Numerical results have been obtained to evaluate optical performance and the implementation of a 4×4 demonstrator, supporting a 2.5 Gbit s-1 input/output rate, shows the feasibility of the matrix with state-of-the-art optical technology.Its high performance makes the fibre delay line switching matrix a strong candidate for implementing the core of future high-speed broadband ATM switches.

Letter: Design and implementation of a fiber delay line optical buffer for multi gigabit photonic switching fabrics

Full photonic packet switching fabrics require memories, which are not available today in the optical domain : therefore, an alternative is the use of optical buffers based on fibers used as delay lines. This letter reports the optimised implementation of such a buffer operated in a multiwavelength regime and accessed by fast optical gates. The buffer operating principles and two different implementation structures are first briefly presented. Then differential delays and influence on bit error rate performance are discussed on the basis of test results within a 4 x 4 photonic packet switching matrix handling ATM cells at 2.488 Gbit/s. The results demonstrate that fiber delay lines are a simple, potentially cost-effective solution to implement buffering within highspeed photonic packet switching systems, adopting current optical technology.

System design and evaluation of a large modular photonic ATM switch

A photonic ATM switching node based on the Fibre Delay Line switching element developed in the framework of the RACE project ATMOS (ATM Optical Switching) is described. The feasibility of this switching element has been proved within the physical limitation of present-day technology to support up to 16 input and 16 output lines and a buffer capacity of at least 16 cells for each output. In this paper various interconnection options are discussed with the aim of a large, high throughput switch implementation. In particular a Clos architecture is chosen for the design of a 256 x 256 switching fabric operating at 2.5 Gbit/s and its performance is evaluated by means of simulation in a random and bursty traffic environment. It is demonstrated that a multiplane configuration of optical matrices followed by an efficient concentration strategy is capable of meeting the target ATM requirements, that is cell loss probability less than 10 -9 with load up to 0.8. A detailed design of the switch and its complexity evaluation are also given.

Photonic time-switching using semiconductor optical amplifier gates and fiber delay line optical buffer

We have demonstrated photonic packet switching in the time domain using semiconductor optical gates and a four-fiber delay lines optical buffer. Less than 1 dB penalty has been observed at a 600 Mbit/s rate, although no guard bands were inserted between packets to be switched.

Design Implementation of a Gigabit ATM Photonic Switching Matrix

This paper presents a high-performance ATM photonic switching matrix, consisting of an all-optical self-routing high-speed network electrically controlled. The matrix internal architecture is based on wavelength encoding, for cell routing and multiplexing, and on output queueing, for providing the buffering function: its operating principles are fully illustrated. The matrix optical key components are described in detail, discussing as well the main physical constraints imposed by their current characteristics, and their impact on the matrix dimensioning are discussed. Finally, a rack-mounted, reduced size demonstrator, a 4 x 4 matrix supporting a 2.5 Gbit/s input/output rate, has been implemented and the obtained good results in terms of bit error rate and of hardware integration and reliability are reported. This demonstrator shows the switch feasibility with state-of-the-art optical technology.

Photonic ATM-switching matrix based on wavelength routing

We describe an ATM switching matrix based on wavelength encoding of cells for space switching. Taking advantage of the encoding scheme, the cells are buffered in a reduced set of fiber delay lines for contention resolution.