Jean-Daniel Lan Sun Luk

A Compact Rectenna Device at Low Power Level

This article describes the design and performances of a rectenna that collects low incident power density levels, at a single ISM-band frequency (f0 = 2.45GHz). A new rectenna topology consisting only of an antenna, a matching circuit, a Schottky diode, and a DC filter has been modeled using a global simulation. A circular aperture coupled patch antenna is proposed to suppress the first filter in the rectenna device, and in addition, the losses associated with this filter. The harmonics rejection of the antenna is primarily used to reduce the rectenna size. The implementation of the filter in the antenna structure, combined with a reduction of the rectenna size, gives several advantages in several applications where the size and weight are critical criteria. The maximum energy conversion efficiency in this configuration is 34% and is reached for a load of 9.2 kΩ and a RF collected power of SRF = 17μW/cm2 (≈ −10 dBm RF incident upon the diode).

Broadband Modelling of a High Efficiency Rectenna for Batteryless RFID Systems

This article presents an equivalent circuit approach used for the modelling of a system consisting of an antenna and a RF/DC rectifying circuit (rectenna). This system is developed for microwave energy transfer to low energy consumption wireless devices at 2.45 GHz. The measurements and simulations steps used for parameter extraction and model validation are presented. It is shown that using this approach, no electromagnetic simulation tool is required for the simulation and optimization of the overall circuit. Furthermore, this method allows for the physical origin of the energy losses in the system to be quantified. Results obtained using this simple example show a good agreement with the experiment on a broad frequency range and can form the basis for further developments of more complex systems.

PSO-based charge pump chip area minimization

In this paper a solution of the well-known silicon area/performance dilemma and an energy harvesting circuit for wireless sensor nodes are presented. A PSO-based integrated circuit area optimization methodology is proposed. The study is performed on a charge pump circuit, using a 0.35μm Si-CMOS process. The PSO sizing strategy has been implemented using a Spice kernel and Matlab environment. The chip size has been reduced from 583μm2 to 179μm2 after the optimization process. Simulation results from the 0.35μm parameters are given. When driving a capacitive load of 50pF, the output-generated voltage is 4V from a 1.3V input voltage. The simulated pumping gain is 3.1.

DC-pass filter design with notch filters superposition for CPW rectenna at low power level

In this paper the challenging coplanar waveguide direct current (DC) pass filter is designed, analysed, fabricated and measured. As the ground plane and the conductive line are etched on the same plane, this technology allows the connection of series and shunt elements to the active devices without via holes through the substrate. Indeed, this study presents the first step in the optimization of a complete rectenna in coplanar waveguide (CPW) technology: key element of a radio frequency (RF) energy harvesting system. The measurement of the proposed filter shows good performance in the rejection of F0=2.45 GHz and F1=4.9 GHz. Additionally, a harmonic balance (HB) simulation of the complete rectenna is performed and shows a maximum RF-to-DC conversion efficiency of 37% with the studied DC-pass filter for an input power of 10 µW at 2.45 GHz.

An integrated model of a wireless power transportation for RFID and WSN applications

In this paper a simple and efficient model is proposed to predict the received direct current (DC) power in wireless power transportation (WPT) systems, for Radio Frequency Identification (RFID) and wireless sensor network applications. The conversion of radio frequency (RF) power into usable DC power is done by a rectenna (a rectifying circuit with an antenna). The DC power was estimated using a model that takes into account the distance between the antennas, the power transmitted, the reflection and the diffraction mechanism associated with the laboratory environment, and the load value. For this purpose, the analytical model is compared to measurement results. This model was implemented in a RF simulation environment.

AN ISM BAND CONVENTIONAL CPW RECTENNA FOR LOW POWER LEVELS

This paper presents the design and fabrication of a coplanar waveguide (CPW) rectenna using a sequential modular approach. The rectenna is printed on high permittivity, low-loss board ARLON AD1000 (r = 10.35 and tan δ = 0.0023 @ 10 GHz). The rectifier section is realized with a single reverse-biased schottky diode SMS-7630 in reverse topology for which a diode model is obtained at −20 dBm for frequencies F 0 = 2.45 GHz and 2F 0 = 4.9 GHz. The low-pass filter and the impedance matching are synthesized from passive CPW structures. Co-simulation technique is used to overcome CPW simulation limitations and to integrate the diode characteristics. The antenna consists of a circular slot loop antenna with stub matching such that its input impedance is close to 50 Ω. The goal of this work is to design a rectifier to simplify and speed up the fabrication process of a rectenna array. We reduced the number of processes to etch the rectifier on the board and minimized the number of lumped elements. At −20 dBm, simulation of the rectifier with an ideal impedance matching network shows rectification at 2.45 GHz with efficiency of 12.8%. The rectifier and rectenna show efficiency of approximately 10% at an operating frequency of 2.48 GHz.

Design of a CPW fed circular slot loop antenna for RF/DC rectifier at low power level

This work deals with the design and implementation of a planar and compact antenna realized on Arlon AD1000 substrate, εr=10.35. The antenna consists of a CPW fed circular slot loop antenna with two stubs as impedance matching circuitry. The antenna was designed for 2.45 GHz in order to be implemented with a RF/DC rectifier optimized for low power level in CPW technology. Thus, allowing easy and fast fabrication of a rectenna array with a high reproducibility between one rectenna conception to another one.

Design of compact integrated diodes Pifa rectennas for energy harvesting application

In this paper we propose new compact PIFA rectennas dedicated to the powering of small wireless sensors of low power. The compactness is achieved by removing the filtering and impedance matching circuits and by integrating directly inside the PIFA several Schottky diodes. The optimization of such high integrated and nonlinear radiating structure can be performed only by the mean of a global time domain simulation technique. A Homemade software based on TLM method was then used to design 40×40mm2 PIFA rectennas integrating up to four SMS7630 Schottky diodes. They are capable of harvesting up to 3.67mW DC power in a 3.5kfi load resistor from a plane wave with an extremely low power density of 1μW/cm2 and with a frequency of 2.45GHz.

DC-pass filter conception for CPW rectenna design

In this paper the challenging coplanar waveguide DC-pass filter is designed, analysed, fabricated and measured. As the ground plane and the conductive line are etched on the same plane, this technology allows the connection of series and shunt elements to the active devices without via holes through the substrate; however the parasitic effects are inevitable. Indeed, this study presents the first step in the optimization of a rectenna: key element of an RF energy harvesting system. The measurement of the proposed filter show good performances in the rejection of F0=2.45 GHz and F1=4.9 GHz. Additionally, the maximum RF-to-DC conversion efficiency of 32% was successfully achieved in HB simulation with the realized DC-pass filter for an input power of 10 μW at 2.45 GHz.