Jeffrey Ewanchuk
University of Alberta
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Publication
Featured researches published by Jeffrey Ewanchuk.
IEEE Transactions on Industry Applications | 2009
John Salmon; Jeffrey Ewanchuk; Andrew M. Knight
The number of output-voltage levels available in pulsewidth-modulated (PWM) voltage-source inverters can be increased by inserting a split-wound coupled inductor between the upper and lower switches in each inverter leg. Interleaved PWM control of both inverter-leg switches produces three-level PWM voltage waveforms at the center tap of the coupled inductor winding, representing the inverter-leg output terminal, with a PWM frequency twice the switching frequency. The winding leakage inductance is in series with the output terminal, with the main magnetizing inductance filtering the instantaneous PWM-cycle voltage differences between the upper and lower switches. Since PWM dead-time signal delays can be removed, higher device switching frequencies and higher fundamental output voltages are made possible. The proposed inverter topologies produce five-level PWM voltage waveforms between two inverter-leg terminals with a PWM frequency up to four times higher than the inverter switching frequency. This is achieved with half the number of switches used in alternative schemes. This paper uses simulated and experimental results to illustrate the operation of the proposed inverter structures.
IEEE Transactions on Industrial Electronics | 2013
Jeffrey Ewanchuk; John Salmon
In high current applications, paralleling three-phase voltage sourced inverters represents a modular solution for improving the system power conversion quality. Single-phase output reactors are often inserted between the output terminals of the two inverters that supply the same phase output. One function of these inductors is to limit circulating currents between the two inverters. These currents are produced by common-mode voltage differences between the three-phase output terminals of the two inverters. Since standard interleaved pulse width modulation (PWM) techniques naturally produce high-frequency common-mode voltage differences between parallel connected inverters, this paper describes a modified discontinuous PWM scheme that eliminates these voltage differences. As a result, a three-phase parallel inverter system can be operated using a single three-limb coupled inductor, significantly improving the system power conversion density as a result. An experimental 3 kW prototype system is used to compare the operation of the resultant inverter against one using separate single-phase coupled inductors.
IEEE Transactions on Power Electronics | 2009
John Salmon; Andrew M. Knight; Jeffrey Ewanchuk
The number of voltage levels available in pulsewidth modulation (PWM) voltage source inverters can be increased by using a split-wound coupled inductor within each inverter leg and interleaved PWM switching of the upper and lower switches. The magnetizing inductance of the symmetrical split-wound inductor filters the high-frequency PWM voltage differences between the upper and lower switches. The same inductor presents a three-level PWM voltage at the inverter output terminals, with the winding leakage inductance being located in series with the low-frequency output current. Deadtime PWM signal delays can be reduced as DC-rail short circuits are not possible: as a result, the quality and voltage range of the PWM output is improved. Since the inductor windings are technically exposed to high-frequency PWM AC voltages with no DC components, device voltage drops help to reduce the buildup of winding DC currents. Theoretical analysis and a sample design case are presented to illustrate how to design suitable inductors for the various topologies. Simulation and experimental results are used to illustrate the operation of the proposed inverter structures.
IEEE Transactions on Magnetics | 2008
Andrew M. Knight; Jeffrey Ewanchuk; John Salmon
This paper presents the use of coupled inductors to allow interleaved switching of the upper and lower switches of three-phase inverters. The approach increases the number of output voltage levels and reduces the magnitude of the output line currents at switching frequency. Two possible inductor topologies are investigated. Individual toriodal inductors for each phase are shown to provide more switching possibilities, at the cost of size and required DC fluxes. Three-phase three-limb inductors require more careful operation of the power electronics, but with significantly smaller core requirements. Simulated and measured inductor performance is presented, along with comments on the design of future inductors for similar applications.
IEEE Transactions on Power Electronics | 2013
Jeffrey Ewanchuk; John Salmon; Chris Chapelsky
An operational approach to an induction machine is presented that uses an open winding connected to a dual inverter system. A floating capacitor inverter bridge boosts the fundamental voltage available to the machine and arbitrarily sets the operating power factor of the main inverter bridge connected to the dc battery power source. During operation, the motor current charges the floating bridge dc capacitor voltage to a naturally stable dc voltage level and the ac voltage delivered to the machine is the resultant sum of the two inverter bridge voltages. Machine voltage boosting is then achieved by adjusting the fundamental phase angle difference between the two inverters to control the charge stored in the floating bridge capacitors. With the floating bridge providing reactive voltage support and therefore boosting the available supply voltage to the induction machine, there are two main outcomes: minimization of the supply current required for operation beyond the base speed of the electric machine, and supply voltage regulation of the drive system. Experimental results are used to verify the operation of the floating bridge arrangement by examining the load power factor angle and the phase difference between the two bridges. Results are presented for a passive RL load to illustrate the supply current reduction at high fundamental frequency operation, and a modified 2-hp, 1800-r/min induction to illustrate the dc voltage supply droop compensation.
power electronics specialists conference | 2008
John Salmon; Andrew M. Knight; Jeffrey Ewanchuk
The number of voltage levels available in PWM voltage source inverters can be increased by using a split-wound coupled inductor within each inverter-leg and using interleaved PWM switching of the upper and lower switches. The magnetizing inductance of the symmetrical split wound inductor filter the high frequency PWM voltage differences between the upper and lower switches. The same inductor presents a 3-level PWM voltage at the inverter output terminals, with the winding leakage inductance being located in series with the low frequency output current. Dead-time PWM signal delays can be reduced as DC-rail short circuits are not possible: the quality and voltage range of the PWM output is improved as a result. Since the inductor windings are technically exposed to high frequency PWM AC voltages with no DC components, device voltage drops help to reduce the build up of winding DC currents. Theoretical analysis and a sample design case is presented to illustrate how to design suitable inductors for the various topologies. Simulation and experimental results are used to illustrate the operation of the proposed inverter structures.
ieee industry applications society annual meeting | 2008
Jeffrey Ewanchuk; John Salmon; Andrew M. Knight
This paper examines the performance of a novel multilevel six-switch three phase inverter drive for low-voltage high speed motor applications. Hard switched voltage source inverter topologies are limited in terms of switching frequency and therefore as the frequency modulation ratio decreases, the resulting increase in harmonic currents may cause excessive rotor heating or lead to larger than desired output reactors with a series voltage drop. The multi-level inverter structure offers an increased number of voltage levels, reduced dead-time effects and a significant reduction in harmonic content, resulting in a reduction of total losses compared to the standard six-switch three phase inverter. The harmonic reduction provided by the multilevel topology relative to the standard inverter is experimentally demonstrated with a 15 HP 18,000 rpm induction machine.
IEEE Transactions on Industry Applications | 2011
Jeffrey Ewanchuk; John Salmon; Behzad Vafakhah
A twelve-switch, three phase, five/nine level inverter is presented for applications using a high speed electric machine with a relatively low per-unit leakage reactance. By reducing the voltage blocking requirement of the semiconductors, the neutral point clamped variant of the coupled inductor inverter topology (NPC-CI) is more suited to high DC bus voltages, and features a significant reduction in magnetic material required over six-switch coupled inductor inverters. This paper describes the operational and design techniques for the NPC-CI inverter. A simple continuous PWM technique for operation with a three-limb core is presented and the specific design challenges involved in the NPC-CI inverter are highlighted: designing the three-limb coupled inductor, the natural balancing action of the split-dc link, semiconductor stresses, inverter construction and practical considerations for inverter operation of the drive. Machine performance is then illustrated on an unloaded 18,000 rpm 15HP induction machine to emphasize the harmonic quality improvement, and on a loaded 2HP utility speed induction machine to demonstrate transient performance.
IEEE Transactions on Industry Applications | 2009
Jeffrey Ewanchuk; John Salmon; Andrew M. Knight
The performance of a novel multilevel six-switch (SS) three-phase inverter drive is examined for low-voltage high-speed motor applications. The switching losses of hard-switched voltage-source-inverter topologies place limits on the maximum feasible switching frequency. When operating at higher fundamental frequencies, this results in low-frequency modulation ratios and either high load harmonic currents that cause excessive rotor heating or larger than desired output reactors with a large fundamental voltage drop. The multilevel inverter structure examined offers an increased number of output pulsewidth-modulated (PWM) voltage levels, higher frequency PWM output waveforms, reduced dead-time effects, and a significant reduction in harmonic content. These features reduce the total losses in the motor load when compared to the standard SS three-phase inverter. The harmonic reduction provided by the multilevel topology relative to the standard inverter is experimentally demonstrated with a 15-hp 18 000-r/min induction machine.
IEEE Transactions on Industry Applications | 2011
Behzad Vafakhah; Jeffrey Ewanchuk; John Salmon
Multicarrier interleaved pulsewidth modulation (PWM) techniques are presented for a five-level neutral point clamped inverter using a three-phase coupled inductor. The inverter operation is demonstrated using a simple multicarrier interleaved PWM algorithm. Since both the inverter and inductor power losses are closely linked to the magnitude of the inductor current ripple, improved multilevel interleaved PWM techniques are presented based upon the concept of interchangeability of switching states in each phase. The proposed PWM techniques, which are easier to implement when compared to multilevel space-vector PWM techniques, also exploit the use of switching states with a high-effective winding inductance to minimize the inductor current ripple. Simulation results are presented to illustrate the improvements obtained in the inverter waveforms and their harmonic spectrum. Experimental results demonstrate how the inductor current ripple and the related power losses are significantly reduced using the proposed PWM scheme.