Jenoe Tihanyi

A new generation of high voltage MOSFETs breaks the limit line of silicon

For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.

Power MOS transistors for 1000 V blocking voltage

High-voltage MOS transistors with blocking voltages of up to 1000 V and turn-on resistances of less than 2 Ω were developed and tested. The transistor structure itself is that of a vertical SIPMOS+(1) power transistor. Retaining this technology, a special design of the cell field and a new type of chip edge construction became necessary in order to achieve the quoted values. The required constructional dimensions were obtained with the aid of a two-dimensional modelling program. (+SIPMOS = Siemens Power MOS)