Jeong-M. Choi

Comparative study of the photoresponse from tetracene-based and pentacene-based thin-film transistors

We report on the photoresponse from tetracene-based and pentacene-based thin-film transistors (TFTs) with semitransparent NiOx source/drain electrodes and SiO2∕p+-Si substrate. Both organic TFTs have been fabricated with identical channel thickness and device geometry. Compared with pentacene-based TFTs, the tetracene-TFT exhibited superior potentials as a photodetector in the visible and ultraviolet range although it showed a field mobility (μ=0.003cm2∕Vs) which is two orders of magnitude lower than that of the pentacene-based TFT (μ=∼0.3cm2∕Vs). The tetracene-TFT displayed a high photo-to-dark current ratio (Iph∕Idark) of 3×103, while that of the pentacene-TFT was only ∼10.

Flexible semitransparent pentacene thin-film transistors with polymer dielectric layers and NiOx electrodes

We have fabricated the flexible semitransparent pentacene-based thin-film transistors (TFTs) with poly-4-vinylphenol (PVP) dielectric layers which were deposited by spin coating on a thermostable plastic substrate with a conductive film. For the source∕drain (S∕D) electrodes of our flexible pentacene TFTs both Au and semitransparent NiOx have been tested. It was found that NiOx was better matched to the pentacene channel for the S∕D contacts than Au. Our flexible pentacene TFTs with semitransparent NiOx contacts exhibited mobility of ∼0.24cm2∕Vs higher than that achieved with Au contacts (∼0.14cm2∕Vs) and also demonstrated a higher initial drain current.

Transparent thin-film transistors with pentacene channel, AlOx gate, and NiOx electrodes

We report on the fabrication of pentacene-based transparent thin-film transistors (TTFT) that consist of NiOx, AlOx, and indium-tin-oxide (ITO) for the source-drain (S/D) electrode, gate dielectric, and gate electrode, respectively. The NiOx S/D electrodes of which the work function is well matched to that of pentacene were deposited on a 50-nm-thick pentacene channel by thermal evaporation of NiO powder and showed a moderately low but still effective transmittance of ∼25% in the visible range along with a good sheet resistance of ∼60Ω∕◻. The maximum saturation current of our pentacene-based TTFT was about 15μA at a gate bias of −40V showing a high field effect mobility of 0.9cm2∕Vs in the dark, and the on/off current ratio of our TTFT was about 5×105. It is concluded that jointly adopting NiOx for the S/D electrode and AlOx for gate dielectric realizes a high-quality pentacene-based TTFT.

Rubrene thin-film transistors with crystalline and amorphous channels

The authors report on the fabrication of rubrene organic thin-film transistors (OTFTs) with crystalline and amorphous channels, which were achieved by patterning a rubrene thin film deposited under a specific condition. The deposited film was mostly covered by amorphous rubrene matrix with smooth surface except many crystalline rubrene disks embedded with rough surface. When the channel of OTFT covers some portion of crystalline disks, the OTFT displayed a typical field effect behavior while it showed little drain current with the channel covered with amorphous background. Typical field mobility obtained from OTFT with crystalline disks was 1.23×10−4cm2∕Vs with an on/off current ratio of ∼103.

Rubrene polycrystalline transistor channel achieved through in situ vacuum annealing

The authors report on the rubrene polycrystalline film growth for its thin film transistor (TFT) applications. Amorphous rubrene thin film was initially obtained on 200-nm-thick SiO2∕Si substrate at 40°C in a vacuum chamber by thermal evaporation but in situ long time postannealing at the elevated temperatures of 60–80°C transformed the amorphous phase into crystalline. Based on an optimum condition to cover the whole channel area with polycrystalline film, the authors have fabricated a rubrene TFT with a relatively high field effect mobility of 0.002cm2∕Vs, an on/off ratio of ∼104, and a low threshold voltage of −9V.

Improving Resistance to Gate Bias Stress in Pentacene TFTs with Optimally Cured Polymer Dielectric Layers

We report on the insulator charging effects of poly-4-vinylphenol (PVP) gate dielectric on the reliabilities of pentacene thin-film transistors (TFTs). Our PVP films were prepared by spin coating and subsequent curing at various temperatures (155, 175, and 200°C). Evaluated using Au/PVP/p + -Si structures, the dielectric strength of PVP films cured at 175°C was superior to those of the other PVP films cured at different temperatures. Although the field mobility (∼0.13 cm 2 /V s) obtained from a TFT with PVP film cured at 200°C appeared higher than that (∼0.07 cm 2 /V s) from the device with 175°C-cured polymer film, the TFT prepared at 200°C revealed a low on/off current ratio of less than 104 due to its high off-state current and a higher sensitivity to gate bias stress. The unreliable behavior is due to the dielectric charging caused by gate electron injection. We thus conclude that there are some optimal PVP-curing conditions to improve the reliability of pentacene TFT.

Ultraviolet-enhanced device properties in pentacene-based thin-film transistors

The authors report on the ultraviolet (UV)-enhanced device properties in pentacene-based thin-film transistors (TFTs). Pentacene TFTs showed a degraded mobility and lowered saturation current after illumination by a high energy UV with 254 nm wavelength. However, under 364 nm UV these devices surprisingly displayed enhanced saturation current and also showed threshold voltage shift toward lower values, maintaining their mobilities. The saturation current increase and threshold voltage shift were further related to the negative fixed charges excessively formed at the pentacene/dielectric interface by the low energy UV. The authors thus conclude that a low energy UV could rather enhance the pentacene TFT performances and also control the threshold voltage of the device.

Polymer/ AlO x Bilayer Dielectrics for Low-Voltage Organic Thin-Film Transistors

We report on the low-voltage-driven organic thin-film transistors (OTFTs) with various organic films [pentacene, tetracene, and copper-phthalocyanine (CuPc)] for the semiconductor channel on a thin poly-4-vinylphenol (PVP)/aluminum oxide (AlO ℵ ) bilayer gate dielectric. Quite a large capacitance of 31 nF/cm 2 and a high dielectric strength of ∼4 MV/cm were achieved from the 45 nm thin polymer/100 nm thick A1O, bilayer dielectric. All the organic channel layers deposited on the bilayer exhibited good crystalline quality as characterized by both X-ray diffraction (XRD) and atomic force microscopy (AFM) surface imaging because the bilayer had a smoothened and hydrophobic PVP surface on top. Our OTFTs with the bilayer dielectric exhibited good field-effect mobilities of 0.55, 0.07, and 0.004 cm 2 /V s for pentacene, tetracene, and CuPc channels, respectively, at a low operating voltage of less than -8 V.

Determining the optimum pentacene channel thickness on hydrophobic and hydrophilic dielectric surface

We report that the optimum pentacene channel thickness is dependent on the surface energy state of its dielectric substrate. Pentacene thin-film transistor (TFT) with hydrophobic substrate displays a peak linear mobility at an optimum channel thickness of 50nm, below or above which the linear mobility decreases. In contrast, the linear mobility of the TFT with hydrophilic substrate monotonically increases until the channel thickness decreases to 15nm. According to atomic force microscopy of 15-nm-thin pentacene grown on the SiO2 and poly-4-vinyphenol (PVP) dielectrics, the pentacene islands on PVP are not perfectly interconnected unlike the case on SiO2.

High-gain pentacene-based inverter achieved through high and low energy ultraviolet treatments

The authors report on the fabrication of pentacene-based inverter with two p-channel thin-film transistors (TFTs) on polymer∕AlOx bilayer dielectric, which has been patterned by high energy ultraviolet (UV) (254nm) illumination. After pentacene channel growth on the dielectric, the inverter showed a high voltage gain of ∼10 under −6V supply voltage (VDD) but at a transition voltage of −1V which is too marginal to guarantee a desirable inverter operation between 0 and −6V. When low energy UV (352nm) was applied onto one of the two p TFTs, which plays as a load in the inverter circuit, the transition voltage shifted to an adequate value (−3V) because the UV changes the threshold voltage of the load TFT to be lower. The UV-treated inverter demonstrated a high voltage gain of ∼150 under a VDD of −30V.