Jerome Kirscher

Verification of an Automotive Headlight Leveling Circuit and Application Using Smart Component Property Extraction

The paper discusses the simulative circuit verification of a power bridge in the context of its application, i.e. an automotive headlight leveling system. It especially emphasizes a topic, which is often neglected in mixed-domain modeling: the identification of the related component properties, e.g. the armature friction or torque constant of an electric motor. Typically, there are two ways to approach the problem: one is to scan the data sheets of the components. The other is to set up direct measurements of the component properties. The first approach opens a wide space, as the spec windows are often larger. The second requires substantial, additional effort. The paper offers a third opportunity, which relies on a measurement setup for system evaluation, which was available anyway.

On the influence of angle sensor nonidealities on the torque ripple in PMSM systems — An analytical approach

Accurate measurement of rotor angle in Permanent Magnet Synchronous Motor (PMSM) drive applications is important when high performances as low level torque ripples are required. If the relationship between torque ripple and angle error is known, then, further steps can be done in order to reduce the level of the ripple. Based on an analytical description of the sensor model, a relationship between the angle error and speed error (seen as a noise source for the system) as well as torque ripples are deduced. Simulation results for a specific range of mechanical speed using SystemC-AMS models confirm the theoretical analysis.

Emulation-based robustness assessment for automotive smart-power ICs

In this paper we present a concept for assessing the robustness of automotive smart power ICs through lab measurements with respect to application variance and parameter spread. Classical compliance to the product specification, where only minimum and maximum values are defined, is not enough to assess device robustness since complex transients of application components cannot be defined within single specification parameters. That is why application fitness becomes a necessary task to reduce device failures, which may occur in the application. One solution would be to enhance traditional lab verification methods with a concept that considers application and parameter spread. This innovative concept is demonstrated on an electronic throttle control application. It has been emulated in real-time, including power amplification and application-relevant parameters. Monte Carlo experiments were carried out within the application space to evaluate the influence of parameter spread on selected system characteristics. Finally, an appropriate metric was used to quantify the robustness of the micro-electronic device within its application.

Monte Carlo based post-silicon verification considering automotive application variances

In this paper we present a fully automated approach to consider device-to-device variances of automotive power applications during post-silicon verification. Due to the high complexity of target applications for automotive smart power microelectronics, it is not sufficient to affirm compliance to their specification. Car manufacturers therefore push for more extensive application robustness beyond classical methods. To cope with this requirement a FPGA platform is used to evaluate physical equations of automotive power application components in real-time together with a dynamic power amplifier to interface the digital FPGA outputs to the analog world. The functionality and the advantage of this approach is evaluated based on several Monte Carlo experiments by using an Advanced Front Lighting system as an example.

Simulation-based approach to application fitness for an E-Bike

Apart from fulfilling component electrical specifications, electronics needs to fit into the target application, composed of electronics components as well as mechanical parts. In complex applications such investigations can be made by simulations in which relevant application performances are checked under any allowed variation of operating conditions, design parameters and noise factors. In this paper, we investigate verification methods for application fitness, on top of specification compliance. These are supported by a flow, which supports to assess a components impact on the application performances. This flow is applied on an E-Bike application modelled in SystemC-AMS. The objective is to answer whether the assessed component reasonably serves the application in an environment with uncertainties. To accomplish this, concepts of experiment planning, metamodeling and sensitivity analysis are applied.

Fault grouping for fault injection based simulation of AMS circuits in the context of functional safety

The fault injection technique is utilized for simulation-based verification of safety-related analog and mixed-signal (AMS) circuits for compliance with safety requirements in the presence of hardware faults. Exhaustive fault simulation is very time consuming with respect to the number of faults to simulate at circuit level. For efficient simulation-based verification, a fault grouping approach is proposed to reduce the number of faults to simulate without missing out potentially safety-critical faults. The fault grouping approach is based on component-level fault simulation, hierarchical clustering and internal cluster validation. The effectiveness is investigated on a component extracted from an automotive safety-related System on a Chip.

Safety-oriented mixed-signal verification of automotive power devices in a UVM environment

The complexity of automotive applications is continuously increasing, leading to a growing demand for methodologies that offer comprehensive mixed-signal verification. However, compared to the highly automated verification methodologies in the digital domain, pre-silicon verification in the analog domain still implies a substantial amount of manual work and computational effort. Apart from this, automotive applications most often have to comply with functional safety standards and therefore their robustness concerning safety-critical faults needs to be proven. This is normally ensured by performing safety verification with faults being purposefully injected into the designs. In this paper we present a methodology that enables a regression-based mixed-signal verification combined with an existing approach for analog safety analysis. Both concepts are applied to an automotive design, in which faults have been injected, in order to demonstrate their capabilities.

Towards simulation based evaluation of safety goal violations in automotive systems

With the advent of the ISO 26262 it became crucial to prove that electrical and electronic products delivered into safety-related automotive applications are adequately safe. For this purpose safety goal violations due to random hardware failures need to be evaluated. In order to gain evident results for argumentation within the evaluation, a fault injection based approach is utilized. Potential risk scenarios are initiated by injection of analog and digital faults into the heterogeneous behavioral model which comprises the safety-related hardware. For fault injection in heterogeneous models, we propose analog saboteurs, designed in VHDL-AMS, by which amongst electrical or mechanical, diverse energy domain analog hardware faults may be injected. For demonstration of this approach, a hardware model, comprising lithium-ion battery cells with a cell balancing module and safety-related circuitry is used.

Lifetime modeling for a simulative evaluation of package reliability in an automotive application

A lifetime model based on metamodeling has been combined with a system-level simulation to virtually evaluate the relationship between the application a semiconductor component will be actuated in, its operating and environmental conditions and the package failures. The lifetime model is derived out of accelerated stress tests.

Coverage-driven mixed-signal verification of smart power ICs in a UVM environment

The complexity of integrated circuits is continuously increasing, leading to a growing demand for methodologies that offer comprehensive mixed-signal verification concepts. However, compared to the highly automated verification methodologies in the digital domain, pre-silicon verification in the analog domain usually implies a substantial amount of manual work and computational effort. In order to meet the rising challenges, various attempts were made to extend well-established approaches from the field of digital verification to also enable systematic mixed-signal verification. However, no methodology could be identified that meets our requirements for high reusability and maintainability, tool independence as well as capabilities for functional coverage collection. For this reason, we propose a mixed-signal verification methodology that covers the aforementioned as well as additional aspects required for a successful coverage closure. The presented concept is applied to a smart power application to demonstrate its potential and outline the gained benefits.