Jian-min Wang

A Bias-Free Quantum Random Number Generation Using Photon Arrival Time Selectively

We present a high-quality quantum random number generator (QRNG) without posting processing using photon arrival time selectively in accordance with the number of photon detection events within a sampling time interval in attenuated light. It is well showed in both theoretical analysis and experiments verification that this random number production method eliminates both bias and correlation perfectly without post processing and the random number can be clearly passed the standard randomness tests. We fulfill theoretical analyses and experimental verification of the method whose rate can reach up to 45Mbps.We present a high-quality bias-free quantum random number generator (QRNG) using photon arrival time selectively, in accordance with the number of photon detection events within a sampling time interval in attenuated light. It is well shown in both theoretical analysis and experimental verification that this random number production method eliminates both bias and correlation perfectly without more postprocessing and that the random number can clearly pass the standard randomness tests. We fulfill theoretical analysis and experimental verification of the method whose rate can reach up to 45 Mb/s.

Design of Ultra-Low Noise and Low Temperature Usable Power System for High-Precision Detectors

In high-precision detector systems, the power supply usually need to be ultra-low noise and stabilized. Design and implementation of an ultra-low noise power supply is described in this paper. We implemented and tested the power system actually in a scientific CCD (Charge-coupled device) detector system, but the design structure could be used in many high-precision detector systems as infrared detector or high-energy particles detectors. The power system uses DC-DC switching regulators and LDO regulators for power generating, uses multi-stage filters for noise reducing. Multi-output power supply with noise about 40 μVrms is achieved, the overall energy efficiency is 68.5%. Besides, the electronic system takes the low temperature as an important consideration, and the system has been tested in an extreme environment as low as 193 K.

Design of two ASIC chips for scientific CCD detectors

In order to implement the driver and readout functions for several types of scientific CCD detector, meanwhile decreasing the size of electronics and reducing the total power dissipation for a large scale mosaic CCD detector system, two Application-specified Integrated Circuits (ASIC) were designed. One is for CCD driver and called BCDA (Bias Clock Driver ASIC), which is to provide multi-channel clocks and Bias voltage; the other is for CCD video processing and called CVRA (CCD Video Readout ASIC). In the BCDA chip, the bias drivers are generated by high voltage amplifiers. The clock drivers are made of a clock switch circuit and high voltage amplifier. Two 8-bit current-steering DACs are used to adjust the driver capability and high-level voltage of clocks. The CVRA chip processes the video signal of a CCD detector. The functions of CVRA chip consist of pre-amplifier, single-to-differential circuit, CDS circuit, and integrating circuit. The Global Foundry 180 nm BCDlite technology is used in this chip design. The first round of design has been finished and part of tests of two chips have been done.

Thermodynamics simulation for vacuum head of a 1K*1K CCD camera

In a CCD camera system, the CCD sensor must be cooled to low temperature to reduce the dark current. Many factors will affect the cooling performance as we use TEC. Therefore, quantitative analysis of the effects of the various factors on the cooling performance is very important for designing the cooling structure of the CCD vacuum head. In this paper, the length and diameter of the wires between the CCD and the vacuum feedthrough, the thickness of the cold end, and the vacuum degree are taken into consideration and analysis. Through the simulation, useful conclusions are obtained to guide the machanics and cooling design of the CCD vacuum head.

Scientific CCD camera for CSTAR telescope in Antarctica

A 1K*1K CCD camera is designed, implemented and tested for CSTAR telescope in Antarctica, including its mechanics, CCD controller, power and temperature controller unit. Mechanical and electronic design for low temperature environment is taken into consideration fully. The camera has reliable mechanics and stable electronics performance. The readout noise is as low as 3.99݁ି when the CCD readout speed is 100kpixs/s. We fully tested every part of the camera in a Cryogenic refrigerator (-86 degree centigrade) and proved that our camera has the ability to work in Antarctica for a long term. Finally, the camera was tested on the CSTAR telescopes to take observations and the imaging quality meets requirement.

Design of ultra-low noise power system for high-precision detectors

In this paper, we introduce an ultra-low noise power system designed for high precision detectors, like CCD detector. We build low noise power circuit for the front-end electronics, whose noise generally needs to be under 1 mVrms. Because the system may be used in low temperature environment as in Antarctica, the influence of electronic equipment working at 213K-193K is fully considered in the beginning of the design. As a result, the power system passed noise and long-time low temperature test.

Scientific CCD controller for the extreme environment at Antarctic

A prototype of scientific CCD detector system is designed, implemented and tested for the extreme environment in Antarctic, including clocks and biases driver for CCD chip, video pre-amplifier, video sampling circuit and ultra-low noise power. The low temperature influence is fully considered in the electronics design. Low noise readout system with CCD47-20 is tested, and the readout noise is as low as 5e- when the CCD readout speed is 100kpixs/s. We simulated the extreme low temperature environment of Antarctic to test the system, and verified that the system has the ability of long-term working in the extreme low temperature environment as low as -80°C.

A Generic Reconfigurable System With High-Speed Data Transmission and High-Precision Time Measurements Applied to a Quantum Bit Commitment Experiment

A reconfigurable system with high-speed data transmission and high-precision time measurement capability based on optical fiber and FPGA technology is presented in this paper. The design is generic for applications where data transmission and time measurement are required. This could be adapted to particle physic experiment, large imaging system, quantum bit commitment, etc. The system is extendable and reconfigurable, allowing data transmission in a bandwidth of 7.5 Gbps. TDC-GPX for time measurement, signal conditioning, data storage, real-time data processing with an FPGA with standard interface such as USB 2.0 and an expansion interface are included. As an example of an application, the design for bit commitment experiment is fully introduced.

Generic design of master board of CCD controller

In this paper, the master board of CCD controller is designed for scientific CCD imaging system. The master controller board with FPGA control center, provides all of the timing clock to the clock and bias board and the data acquisition board which connect to the CPCI backplane, and USB3.0 high-speed serial bus and fiber optic interface.

A data transmission and time measurement system for bit commitment experiment

A data transmission and time measurement system for bit commitment experiment is introduced in this paper. The design is for requirement of fast data transmission and time measurement of bit commitment experiment including high bandwidth data transmission, storage, real time processing with FPGA, USB 2.0, FPGA-based TDC and TDC-GPX for time measurement. The system is applied in the bit commitment experiments successfully.