Jiangbo Luo
Shanghai Jiao Tong University
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Featured researches published by Jiangbo Luo.
Electronic Materials Letters | 2016
Zhe Liu; Guifu Ding; Jiangbo Luo; Wen Lu; Xiaolin Zhao; Ping Cheng; Yanlei Wang
The AlN/polyimide (PI) hybrid film was studied as the dielectric layer in the redistribution layer (RDL) in this work. The incorporation of the AlN into the PI matrix was achieved by mechanical ball-milling process. The spin-coating process was used to fabricate the AlN/PI hybrid film, which is compatible with micro-electro-mechanical system (MEMS) technology for fabricating RDL. The AlN/PI hybrid film was characterized by Fourier transform infrared (FTIR) spectrum and thermogravimetric analysis (TGA). The effect of the AlN content on the thermal stability, thermal expansion coefficient, hardness and water adsorption of the AlN/PI hybrid film was studied. The results indicated that the addition of AlN nanoparticles improved the thermal stability and hardness, but decreased the thermal expansion coefficient and water absorption of the pure PI film. As an example of its typical application, the AlN/PI hybrid film with 8 wt.% AlN was patterned using micromachining technology and used as the dielectric layer in RDL successfully.
electronics packaging technology conference | 2016
Yunna Sun; Seung-lo Lee; Yanmei Liu; Jiangbo Luo; Yan Wang; Guifu Ding; Hong Wang; Jingyuan Yao
In the 3D integration stages, the structure of the TSV is changed with the development of the procedure. The 3D though silicon via (TSV) integration models with the new updated structure depended on the integration processes (fabricating redistribution layer (RDL), reflowing solders and filling underfill) were analytically studied in this work. The equivalent stress, von Mises stress, was used to describe and evaluate the change rule and trend of the 3D TSV integration models during the integration integrations. The changing mechanism of thermal stress and strain on the updated models was varied for the free-form deformation space was substituted by the new fabricating structure. The thermal mechanical stability of the updated 3D TSV integration model is analyzed by the steady-state solver finite element method (FEM). The maximal von Mises stress of the updated models decreased with the procedures carried on. The thermal mechanical reliability of final 3D TSV integration model during the operating stage was simulated by the time-dependent solver of FEM. After 3 cycles the maximal thermal stress and strain at the maximal temperature (MT) dropped to near the yield stress of Cu, nevertheless, in the 6 cycles the maximum of the MT raised up but still less than the maximum of the past three cycles may result from the reshaped structure and strain harness processes. The tearing and cracks might be induced for the tensile stress in both X and Y directions are all enlarged greatly. However, the shear stress got into a stable value about 105 MPa after 2 cycles.
Journal of Micromechanics and Microengineering | 2014
Guilian Wang; Guifu Ding; Rui Liu; Jiangbo Luo; Di Niu; Junhong Zhao; Xiaolin Zhao; Yan Wang
This paper presents a flexible bond pad (FBP) with a hollow annular protuberance to improve the thermal fatigue lifetime for its application to through-silicon vias (TSVs). The hollow annular protuberance structure across the interface between the filled copper in TSV and silicon substrate not only isolates the FBP from stress/strain concentration regions (the corners of the TSV) but also disperses TSV-induced deformation. The plastic strain distributions of the FBP and conventional plate-type bond pad (CPBP) were simulated by finite element method (FEM) under the temperature cycles. Based on the simulation results, the thermal fatigue lifetimes of the CPBP and the FBP with different TSV diameters were predicted by the Coffin–Manson equation. The results indicate that thermal fatigue lifetimes of the FBP are significantly greater than those of the CPBP and their fatigue lifetimes both decrease with the increase of TSV diameter. To examine the reliability of the predicted results, the CPBP and the FBP with TSV diameter of 100 µm were fabricated by MEMS technology and temperature cycling tests (TCTs) were performed to obtain their thermal fatigue lifetimes. The test results are in good agreement with the numerical simulation results, and it shows that the proposed FBP can effectively improve the thermal fatigue lifetime for TSVs.
Journal of Physics: Conference Series | 2018
Yating Sun; Jiangbo Luo; Guifu Ding
Signal and power incomplete are the main problems of integrated circuits(IC) due to the loss between through-silicon vias(TSVs) in TSV arrays. The finite element method is employed to simulate the transmission performance and crosstalk of TSV arrays in four shapes, and each shape is divided into two ground-signal(GS) distributions. Pentagon-pattern with the signal-in-center TSV obtains the best return characteristics and the crosstalk between two TSVs in square-pattern is minimal. The crosstalk loss is tiniest when signal TSVs are located in the four vertices of square-pattern. This paper may provide useful information in 2.5D/3D integration systems to improve the transmission performance and reduce the crosstalk.
international conference on solid state sensors actuators and microsystems | 2017
Qiu Xu; Zhuo Qing Yang; Yunna Sun; Jiangbo Luo; H. F. Li; Guodong Ding; Xinzhi Zhao; Jinyuan Yao; Jing Wang
This paper reports a novel inertial microswitch with synchronous follow-up compliant electrodes for extending output switch-on pulse width. The flexible movable electrode and stationary electrode are proposed to keep a continuous duration contact by double-stair and spring-shape structures, which can not only extend the output switch-on pulse width but also reduce the impact bounces. Then the inertial microswitch has been fabricated using surface micromachining and multilayer electroplating technology. The comparison testing results show that there is no contact bouncing behavior can be observed under ∼466g half sine-wave shock acceleration and the test output switch-on pulse width can reach 390μs, which is longer than that in the traditional design.
international conference on electronic packaging technology | 2017
Yunna Sun; Zhiyu Jin; Jiangbo Luo; Jian Li; Yating Sun; Yan Wang; Guifu Ding
The hybrid material of PI (with SiC whisker, SiC particle, AlN particle, and diamond particle) is proposed to satisfy the requirement of higher thermal conductivity for the high density package system. The thermal conductivity of the proposed hybrid materials with a moderate amount of doping can be improved to about 6–12 times. The hybrid films are fabricated by mechanical ball-milling process, high speed mechanical stirring and spin-coating process. When the redistribution layer with the improved thermal conductivity (from 0.15 W/m.K to 1.5 W/m.K), the maximal temperature of the Si interposer reduced by 0.89 °C– 3.47 °C (2.50%–4.41%) and maximal thermal gradient decreased by 84.36% when the power density of the chip is among 2 W/m.K–8 W/m.K. And the tensile stress of sy was reduced from −201 MPa to 189 MPa.
international conference on electronic packaging technology | 2017
Zhiyu Jin; Yunna Sun; Jiangbo Luo; Guifu Ding
A de-ionized water cooling system consisting of a microchannel heat sink and some equipment that can be applied to a chip is suggested. To optimize the structure, three kinds of pin fins (rhombus, pentagon and hexagon) are described. The heat transfer performance, the fluid flow and the pressure drop of the microchannel heat sink are simulated by commercial CFD solver Fluent. The inlet and the outlet are arranged at the side face of the heat sink. The volume of it is condensed, so other layer can be attached above or below to satisfy packaging. The maximum temperature of the chip with hexagon pin fins was the lowest one at a dissipation power of 50 W compared with other reference pin fin configurations.
electronics packaging technology conference | 2016
Yunna Sun; Seung-lo Lee; Qiu Xu; Jiangbo Luo; Hongfang Li; Yan Wang; Guifu Ding; Xiaolin Zhao
This work mainly focused on the heat dissipation of the 3D integrated circulates (ICs). In order to satisfy the urgent heat dissipation needs, the optimal design of heat sink and optimized path for transmitting heat is one of the most promising and effective ways. Two methods have been proposed for solving the heat dissipation issues. First one was the optimized microchannel with pin fin integrated with the high-power chips or interposers. The influence of dimension of the pin fin on the heat dissipation was analyzed and optimized by FEM. The demotion of microchannel with the optimized pin fin achieved to more than 50 W/cm2 when fluid (water) speed was 1 m/s. The secondary was a novel heat line design with a cold end, which was composed of a copper plate containing nano arrays and pin fin. With the heat line integrated with Cu-pad connected with pin fin and CNT arrays, the temperature of hotspot has dropped by 17.89% (fluid cooling mode) and 9.95% (air cooling mode).
2016 International Symposium on Advances in Electrical, Electronics and Computer Engineering | 2016
Zhe Liu; Jiangbo Luo; Guifu Ding
A effective method for comparing the thermal conductivity of insulation film was developed here. The thermal simulation on Ansys software indicated that different materials at same thickness exhibit different temperature distribution in this system. Base on this, the new measurement structure was fabricated by MEMS process. The results by Infrared Imager exhibited similar trends with the simulation. So the AlN/Polyimide nanocomposites film at different AlN content are compared based on this. The result shows that the AlN/PI at content(40%) has the high thermal conductivity. Whats more, this method can effectively and conveniently In-situ compare the thermal conductivity of insulation film in MEMS.
Microelectronic Engineering | 2016
Yunna Sun; Shi Sun; Yazhou Zhang; Jiangbo Luo; Yan Wang; Guifu Ding; Yufeng Jin