Jianhui Su

DC-link current balancing and ripple reduction for direct parallel current-source converters

In high power applications, back-to-back (B2B) current-source converters (CSCs) in direct parallel connection results in topologies that allow for transformerless configuration and multilevel current waveforms. However, the unbalanced dc-link currents in steady state and the current ripples in transient are inevitable due to the tolerance of devices and the pulse width modulation (PWM) switching pulse, which involve different voltage-drops across the dc-link inductors. The unequal voltage-drops introduce the unbalanced currents and ripples. This paper presents a way to reduce the dc-link current ripples based on the steady-state current balancing control, which is implemented by proper selection of the redundant switching states and the sequence design. The essence of the strategy is to reduce the voltage-drops across the dc-link inductors, as well as the time invertal of the switching states that involve the same dc link. The control scheme for direct parallel CSCs is implemented based on multilevel space vector modulation (SVM) algorithm. The proposed concepts are verified by a 2MW/4160V Matlab/Simulink model.

Reference-Trajectory-Optimized SVM for High-Power Current-Source Converters to Improve Harmonic Performance and Reduce Common-Mode Voltage

For medium-voltage high-power drives fed by current-source converters (CSCs), a transformerless configuration has benefits in both cost and volume. Removing the isolation transformer necessitates a common-mode choke to undertake the major portion of the drives common-mode voltage (CMV) stress, which would otherwise cause premature failure of the motor insulation system. On the other hand, as device switching frequency in high-power CSCs is normally limited to a few hundred hertz, improving harmonic performance via modulation has always been a challenge. Selective harmonic elimination (SHE) is a preferred modulation scheme in such a system owing to its ability to eliminate several unwanted low-order harmonic currents. Alternatively, conventional space vector modulation (SVM) provides continuous modulation index adjustment capability, but its output current contains low-order harmonics with high magnitudes that may arouse harmful resonances in the system. Aiming at reducing CMV and improving harmonic performance at the same time, this paper proposes a new SVM-based modulation strategy for high-power CSCs using synthesized reference trajectory on the hexagon in the αβ plane. Along with the proposed strategy, two methods of reference trajectory optimization (RTO) are investigated. By introducing a coefficient to the duty-cycle function for RTO, the first method can remove an extra low-order harmonic component, or minimize the weighted total harmonic distortion. The second method, with a different approach of RTO, eliminates the unwanted low-order harmonics by combining the proposed SVM with the SHE. The proposed concepts are verified by both simulation and experimental results.

Common-mode voltage reduction for medium-voltage current source converters by optimizing switching sequences

Common-mode voltages (CMVs) can lead to premature failure of the motor insulation system in medium-voltage (MV) current source drives. This paper proposes a novel space-vector modulation (SVM) based gating strategy that can significantly reduce the peak CMV by optimizing the switching sequences for MV current source converters (CSCs). In the proposed method, the switching sequence of one side of the CSC is fixed and the sequence of the other side is selected to produce the minimum peak CMV. The optimization process is based on the CMV calculation for all the possible switching sequence combinations. To validate the proposed concept, different SVM based control schemes for CSCs are investigated. The results show the effectiveness of the proposed concept. In addition, the proposed strategy can be easily implemented in software and requires no extra hardware. By using this method, the CMV stress of the motor is reduced significantly and the size/weight for the common-mode choke can also be reduced.

Commutation compensation for matrix based rectifiers due to leakage inductances of isolation transformer

This paper proposes a compensation method for isolated matrix based rectifiers. The line side THD and output voltage isolated matrix rectifier are mainly affected by the commutation delay due to transformer leakage inductances. Since DC output voltage is usually regulated by a close loop controller. But the grid side current is affected by the commutation delay. The transformer leakage inductances increases the commutation delay which reduces actual dwell time of the active vector, causes distortion on grid side current with higher current THD. The proposed compensation method takes the commutation time into consideration and extends the dwell time for active vector properly. The algorithm has been verified by simulation results.

A novel SVM based gating strategy for high-power current-source converters with reduced common-mode voltage and improved harmonic performance

In high-power medium-voltage applications, the device switching frequency of current-source converters (CSCs) is usually limited to several hundred Hertz. The selective harmonic elimination (SHE) is preferred due to its superior harmonic performance. However, the valid solution for the switching angles of SHE may not exist in some cases. The converter may switch to trapezoidal pulse-width modulation (TPWM) or space vector modulation (SVM) for solution. The TPWM and SVM schemes can provide variable modulation index control but the output current contains low-order harmonics with high magnitudes. In addition, compared with SHE and TPWM, the peak value of the common-mode voltage (CMV) could be doubled with conventional SVM because of the introduction of zero vector. In this paper, a novel SVM based modulation strategy is proposed for CSCs. Compared with the conventional SVM, the proposed method provides a lower CMV magnitude. In addition, the low-order harmonic contents can be reduced compared with the TPWM or the conventional SVM. Simulation and experimental results are provided to verify the proposed concepts.

Impedance-phase reshaping of LCL-filtered grid-connected inverters to improve the stability in a weak grid

The stability of grid-connected voltage-source inverters (VSI) is deteriorated in a weak grid due to the interaction between the increasing grid impedance and the inherent inverter impedance. To improve the stability of LCL-filtered VSI, an impedance-phase reshaping method is proposed in paper. With this output current feedback compensator, the phase margin at the impedance intersection can be improved dramatically. A straightforward parameter design method is also introduced to simplify the design procedure. Simulation and experimental results valid the effectiveness of the proposed the method and design methodology.

Improved space vector modulation for matrix converter based isolated rectifiers

In this paper, an improved Space Vector Modulation (SVM) scheme is developed for matrix converter based rectifier. The conditions of using traditional SVM include small current ripple and continuous current operation mode (CCM). Thus the converter requires a very large inductor on DC side. To further reduce the size of converter, Discontinues current mode (DCM) is adopted for high efficiency compact design. The developed the modulation scheme works well with both CCM and DCM. The simulation results show that the line side current THD is further improved with proposed modulation scheme, especially for DCM operation.