Jiaxin Liu

A 1-V DTMOS-Based fully differential telescopic OTA

The dynamic threshold MOSFET (DIMOS) in standard CMOS technology can be realized by connecting the body of a PMOS to the gate. The threshold voltage of a DTMOS transistor is reduced by forward bias of the source-body PN junction, making it possible to operate in low voltage circuits. In this paper, we propose a 1-V DTMOS-Based fully differential telescopic cascade OTA. The output swing and input common-mode range are enlarged by the DTMOS input pair. A concise bias circuit with negative feedback guarantees all transistors operate in the proper regions in all working conditions. A bulk-driven continuous time common mode feedback (CMFB) is designed and embedded in the biasing circuit, no extra current is consumed. The circuit is designed in 0.18 μm CMOS technology, simulations show that DC gain is 79 dB in typical condition and keeps above 70 dB in all working conditions, the input common mode range and output swing are enlarged to 0.4 V and 0.94 V respectively.

A 255nW 138kHz RC oscillator for ultra-low power applications

An on-chip sub-μW RC oscillator suitable for ultra-low power applications is presented. A technique that cancels both comparator delay and offset are proposed to improve the frequency stability against variations of temperature and supply voltage. This relaxation oscillator is designed and simulated in a 180-nm CMOS technology. The post layout simulation results show that the proposed circuit has a 1-cycle start-up time, and the frequency drift is less than ±0.6%. For the supply voltage changing from 0.9 to 1.2 V, the variation of frequency is -0.72% ~ +0.68% and the temperature coefficient is 75.5 ppm/°C over 0 to 90°C. The power consumption of the proposed oscillator is 255 nW at TT and 27°C.

Current reference with temperature compensation for low power applications

This paper proposes an all CMOS current reference with temperature compensation for low power applications. An offset voltage between the gate terminals of two MOS transistors is utilized to improve the temperature dependency caused by the carrier mobility. The circuit is designed and simulated in 0.18 μm standard CMOS technology. With a 52 nA output current, the temperature coefficient is 60 ppm/°C in a temperature range from -40 °C to 85 °C, the maximum process corner deviation is ±3%, the line regulation is 1780 ppm/V with a supply voltage ranging from 0.95 V to 2.5 V.